Space switch and two-stage S-T drawbacks

What is a space switch?

A space switch connects physically separate input lines (or highways) to output lines. In analogue exchanges it is a metallic crossbar matrix with one crosspoint per call. In digital exchanges it is a time-multiplexed space switch (TMS): a matrix of electronic gates whose connections change every time slot, so each crosspoint is shared by many calls. It changes the highway of a PCM sample, not its time slot.

How does it work?

            O1     O2    ...   OM
 I1 ------- x ---- x --------- x
 I2 ------- x ---- x --------- x
 ...
 IN ------- x ---- x --------- x
            |      |           |
         [CM1]  [CM2]  ...  [CMM]
          c words x log2(N) bits
              ^
     slot counter (0..c-1), clock
              ^
       processor writes CMs

1. There are $N$ input and $M$ output PCM highways, each with $c$ slots per 125 µs frame.
2. Each output column has a control memory with $c$ words; word $t$ contains the number of the input to connect in slot $t$.
3. A time-slot counter steps through the slots. In each slot, every CM is read and a decoder enables one gate in its column (logically each column is an $N$:1 multiplexer).
4. The sample in slot $t$ of the chosen input passes to the same slot $t$ of the output.
5. In the next slot other gates close, so one crosspoint can carry up to $c$ different calls per frame.
6. The processor writes the CM word at call set-up and clears it at release.

Example: CM$_3$(word 4) = 2 → in slot 4, I2 is connected to O3. CM$_3$(word 5) = 6 → in slot 5, I6 is connected to O3.

Features: very fast, large capacity per crosspoint, but it cannot change the time slot, and the crosspoint count grows as $N \times M$.

Two-stage Space–Time (ST) switch: working principle

In an ST switch, a time-multiplexed space stage is followed by a time stage (one TSI on each outgoing highway).

 HW1 -->+-------------+-->[TSI 1]--> OHW1
 HW2 -->|  N x N      |-->[TSI 2]--> OHW2
  ...   |  space      |     ...
 HWN -->|  stage (S)  |-->[TSI N]--> OHWN
        +-------------+
          ^ CM (S)        ^ CM (T)
          +---- processor -+

Connect caller A (slot $i$ on input highway $a$) to called B (slot $j$ on output highway $b$):

1. Space stage: in slot $i$, the S-stage control memory of column $b$ holds $a$, so crosspoint $(a, b)$ closes and the sample of A goes onto the link to TSI $b$, still in slot $i$.
2. Time stage: TSI $b$ writes the sample into its speech memory in slot $i$ and, under its control memory, reads it out in slot $j$.
3. The sample now appears in slot $j$ of output highway $b$: A is connected to B.
4. The reverse direction (B → A) is set up the same way, from highway $b$ to highway $a$.

Example: A in TS5 of HW1, B in TS20 of HW3. In TS5 crosspoint (1, 3) closes; TSI 3 moves the sample from TS5 to TS20.

Drawbacks of the two-stage ST switch

1. Single path, high blocking: the space stage must use the caller's slot $i$. If any other input highway already sends a call to highway $b$ in slot $i$, the link from S to TSI $b$ is busy in slot $i$, and the new call is blocked, even though B and slot $j$ are free. Blocking is about the occupancy of that link, $P_B \approx p$ (e.g. 0.5 at 0.5 E), far worse than the usual grade of service (0.002 to 0.01).
2. No alternative routing: the controller has no choice of path, so a single busy link causes loss.
3. The space stage cannot change slots; the slot change happens only in the final time stage.
4. Large exchanges need a big S matrix and fast TSIs.
5. Same type of problem in TS switches, where the space stage must use the output slot $j$.

 New call: HW2 slot i -> HW3 slot k
 Link S->TSI3 already used in slot i
 by HW1 -> BLOCKED (no other path)

Solving the drawbacks

The cure is to add a third stage so each call has many alternative paths.

1. STS switch (Space–Time–Space)

 HW -->[S: N x k]-->[TSI 1..k]-->[S: k x N]--> HW

• In slot $i$ the input space stage can send the sample to any of $k$ centre TSIs that is free in slot $i$; the TSI changes $i \to j$; in slot $j$ the output space stage sends it to highway $b$.
• Paths = $k$: $P_B = [1-(1-p')^2]^k$, $p' = pN/k$; non-blocking if $k \ge 2N - 1$.

2. TST switch (Time–Space–Time)

 HW -->[TSI: i -> x]-->[S in slot x]-->[TSI: x -> j]--> HW

• The input TSI moves the sample to any free internal slot $x$; the space stage switches it in slot $x$; the output TSI moves it to slot $j$.
• Paths = $l$ internal slots: $P_B = [1-(1-p')^2]^l$, $p' = pc/l$; non-blocking if $l \ge 2c - 1$.

Numerical comparison ($p = 0.5$, no expansion, $c = l = 32$):

• Two-stage ST: $P_B \approx 0.5$
• TST: $P_B = [1 - 0.5^2]^{32} = 0.75^{32} \approx 1.0 \times 10^{-4}$

3. Why TST is chosen in practice

• Time expansion (more internal slots) needs only faster memory; space expansion needs more TSIs and crosspoints.
• For the same blocking, TST uses less hardware and is easier to control (search for one free internal slot; reverse path at $x + l/2$).
• Very large exchanges extend it to TSST or TSSST, using multistage space stages in the middle.

Thus the single-path blocking of ST (and TS) switches is removed by three-stage STS or, preferably, TST structures.