2078 Bhadra · 6 marks

3-bit multiplier with binary parallel adder

Short answer

Multiply A2A1A0 by B2B1B0 using 9 AND gates for partial products. Sum the three rows with two 3-bit parallel adders: P0 = A0B0; first adder adds the second row to shifted first row, producing P1; second adder adds the third row to the remaining sums, yielding P2–P5.

Design a 3 bit binary multiplier using binary parallel adder (BPA).

A 3-bit binary multiplier multiplies $A = A_2A_1A_0$ by $B = B_2B_1B_0$ to give a 6-bit product $P_5\dots P_0$ . Partial products are made with AND gates and added with binary parallel adders (BPA).

Partial products

               A2    A1    A0
             x B2    B1    B0
 -----------------------------
               A2B0  A1B0  A0B0
         A2B1  A1B1  A0B1
   A2B2  A1B2  A0B2
 -----------------------------
 P5 P4   P3    P2    P1    P0

$3 \times 3 = 9$ AND gates make the partial-product bits.
Two 3-bit parallel adders add the three rows.

Design steps

$P_0 = A_0B_0$ directly.
Adder 1 (3-bit): adds row 1 ( $A_2B_1, A_1B_1, A_0B_1$ ) to ( $0, A_2B_0, A_1B_0$ ). LSB of its sum gives $P_1$ .
Adder 2 (3-bit): adds row 2 ( $A_2B_2, A_1B_2, A_0B_2$ ) to (carry of adder 1, upper two sum bits of adder 1). LSB gives $P_2$ , the next two sum bits give $P_3P_4$ , and its carry is $P_5$ .

 A2B0 A1B0  A0B0 -----------------------> P0
  |    |
  0  A2B0 A1B0 + A2B1 A1B1 A0B1
       [ 3-bit BPA #1 ] --- S0 --------> P1
        C, S2, S1
           +   A2B2 A1B2 A0B2
       [ 3-bit BPA #2 ] --- S0 --------> P2
        C   S2   S1
        |    |    +--------------------> P3
        |    +-------------------------> P4
        +------------------------------> P5

Both adders have carry-in $= 0$ .

Example: $101 \times 011$ (5 × 3)

Step	Operation	Result	Product bit
Row 0	$A\cdot B_0 = 101$	pass 010	$P_0 = 1$
Adder 1	$010 + 101$ ( $A\cdot B_1$ )	0 111	$P_1 = 1$ , pass 011
Adder 2	$011 + 000$ ( $A\cdot B_2$ )	0 011	$P_2 = 1$ , $P_5P_4P_3 = 001$

Product $= 001111_2 = 15$ , and $5 \times 3 = 15$ .

Hardware needed: 9 AND gates and two 3-bit parallel adders (or two 4-bit adders such as IC 7483 with the top bit tied to 0).

✓ Answer checked by Claude Opus 5.5 (high effort)

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3-bit multiplier with binary parallel adder

Partial products

Design steps

Example: 101×011101 \times 011101×011 (5 × 3)

Related questions

Example: $101 \times 011$ (5 × 3)