- 2080 Bhadra · 6 marks
Function Σm(0,2,3,5,7,8,10,13,15) using 1:8 DEMUX
Short answer
Use a 1:8 DEMUX with data=1 and selects B,C,D. Outputs Y0,Y2,Y5,Y7 cover all terms except those requiring A'Y3. Final Y = Y0 + Y2 + Y5 + Y7 + A'Y3. Needs a NOT, a 2-input AND, and a 5-input OR.
Realize the following logic function using a single 1:8 demultiplexer and necessary logic gates. Y(A,B,C,D) = Σm(0,2,3,5,7,8,10,13,15)
A 1:8 DEMUX with data input tied to 1 produces the 8 minterms of its three select variables. The 4-variable function is realized by choosing three variables as selects and handling the fourth with a gate.
Choice of select lines
Use as selects () and the data input . Then output is 1 when . Each covers two minterms of the function: (with ) and (with ).
| BCD = j | Minterm j (A=0) | Minterm j+8 (A=1) | Contribution |
|---|---|---|---|
| 0 | 0 ✓ | 8 ✓ | |
| 1 | 1 ✗ | 9 ✗ | – |
| 2 | 2 ✓ | 10 ✓ | |
| 3 | 3 ✓ | 11 ✗ | |
| 4 | 4 ✗ | 12 ✗ | – |
| 5 | 5 ✓ | 13 ✓ | |
| 6 | 6 ✗ | 14 ✗ | – |
| 7 | 7 ✓ | 15 ✓ |
Hence
Circuit
+---------+
1 ------>| D Y0 |-------> Y0
| Y1 | (not used)
B --->S2 | Y2 |-------> Y2
C --->S1 | 1:8 Y3 |-------> Y3
D --->S0 | Y4 | (not used)
| Y5 |-------> Y5
| Y6 | (not used)
| Y7 |-------> Y7
+---------+
A ---[NOT]--- A'
A', Y3 ---[AND]--- A'Y3
Y0, Y2, Y5, Y7, A'Y3 ---[OR 5]---> Y
Gates: one NOT (for ), one 2-input AND () and one 5-input OR.
Check: minterm 11 (): only , but , so (correct, 11 is not in the list). Minterm 3 (): , so . All nine minterms 0, 2, 3, 5, 7, 8, 10, 13, 15 give .
(For reference, the minimal SOP is , which matches the result above.)
✓ Answer checked by Claude Opus 5.5 (high effort)
Related questions
- K-map ΠM(0,2,4,6,7,8,10,13,15) and 8:1 MUX · Digital Logic, chapter 3
- Full adder using a single 1:4 DEMUX · Digital Logic, chapter 4 · asked 5×
- K-map Σ(0,2,3,4,7,8,10,13)+d, logic circuit · Digital Logic, chapter 3
- Minterms/maxterms; K-map Σm(2,4,5,13,14)+d, universal gates · Digital Logic, chapter 3
- K-map Σ(0,1,4,8,10,11,12)+d, realize circuit · Digital Logic, chapter 3 · asked 2×
- K-map Σm(7,9,12,13,14,15)+d, NOR-only · Digital Logic, chapter 3
- Short note: Logic gates · Basic Electrical and Electronics Engineering, chapter 3
- Q and center frequency; realize −2000/(s²+500s+10⁶) · Filter Design, chapter 6
- Tow-Thomas LPF derivation; realize −2000/(s²+500s+10⁶) · Filter Design, chapter 6
- Single chamber settling basin design (15 m³/s) · Hydropower Engineering, chapter 5