Digital clock with decoders for h, min, s

A digital clock is a chain of counters driven by a 1 Hz signal. Each counter's BCD output goes to a BCD-to-7-segment decoder (e.g. 7447/7448) which drives a seven-segment display, so hours, minutes and seconds are shown as decimal digits.

Block diagram

 AC 50 Hz -> [Shaper] -> [÷10] -> [÷5] -> 1 Hz
                                          |
   +--------------------------------------+
   v            SECONDS (00-59)
 [÷10 units] -----> [÷6 tens] -------+ 1 pulse/min
   |                   |             |
 [7447 dec]        [7447 dec]        |
 [7-seg disp]      [7-seg disp]      |
   +---------------------------------+
   v            MINUTES (00-59)
 [÷10 units] -----> [÷6 tens] -------+ 1 pulse/h
   |                   |             |
 [7447 dec]        [7447 dec]        |
 [7-seg disp]      [7-seg disp]      |
   +---------------------------------+
   v            HOURS (01-12)
 [÷10 units] -----> [tens FF] <--- reset/load logic
   |                   |
 [7447 dec]        [decoder]
 [7-seg disp]      [7-seg disp]

Working of each block

1. Time base: the 50 Hz mains (in Nepal) is stepped down and shaped into a square wave by a Schmitt trigger. Dividing by 10 and then by 5 gives exactly 1 pulse per second. (With 60 Hz mains the divider is ÷60; a 32.768 kHz crystal with a 15-stage ÷2 chain is also common.)
2. Seconds section: a mod-10 counter (7490) counts seconds units 0–9. Each time it goes from 9 to 0, its $Q_3$ output falls and clocks the mod-6 tens counter (0–5). When the tens counter reaches 6 (0110), it is reset to 0, and this reset produces one pulse per minute.
3. Minutes section: identical to the seconds section (mod-10 then mod-6, 00–59), clocked by the 1 pulse/min signal. Its output gives 1 pulse per hour.
4. Hours section: a mod-10 units counter and a single flip-flop for the tens digit (0 or 1). Gating logic makes the hours run 01 → 12 and then 01 (a 12-hour clock): when the count reaches 13, the units counter is loaded with 1 and the tens flip-flop is cleared. For a 24-hour clock, the tens counter is mod-3 and both counters are cleared at 24.
5. Decoders and displays: each BCD counter output (4 lines) feeds a BCD-to-7-segment decoder/driver, which turns on the correct segments a–g of a common-anode (7447) or common-cathode (7448) display. The hours tens digit needs only "1" or blank, so a simple driver is enough.

Summary of counters