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Full adder using a 2×4 decoder
Short answer
Use a 2×4 decoder with A,B as inputs to produce minterms Y0–Y3. Sum S = C_in XOR (Y1 + Y2) and carry C_o = Y3 + C_in·(Y1 + Y2). This requires one XOR, two OR, and one AND gate.
Realize Full Adder Circuit using a 2×4 decoder and using logic gates.
A full adder adds three bits A, B and carry-in and gives sum S and carry-out .
Truth table
| A | B | S | ||
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Realization with logic gates
From K-maps / algebra:
A, B ────────[XOR]── P = A⊕B
P, Cin ──────[XOR]──────────────── S
P, Cin ──────[AND]── Cin·P ──┐
├─[OR]── Co
A, B ────────[AND]── AB ─────┘
(Two XOR, two AND and one OR gate.)
Realization with a 2×4 decoder
A 2×4 decoder has only two inputs, so it cannot generate all 8 minterms. Feed A and B to the decoder; its outputs are the minterms of A, B:
Write S and for each AB combination in terms of :
| AB | Decoder output | S | |
|---|---|---|---|
| 00 | 0 | ||
| 01 | |||
| 10 | |||
| 11 | 1 |
(, so these are the same equations as the gate realization.)
+----------+
A ──────>| I1 Y0 |── (not used)
B ──────>| I0 Y1 |── Y1
| 2x4 Y2 |── Y2
| DEC Y3 |── Y3
+----------+
Y1, Y2 ──────[OR]── P (= A⊕B)
P, Cin ──────[XOR]─────────────── S
P, Cin ──────[AND]── Cin·P ──┐
├─[OR]── Co
Y3 ──────────────────────────┘
Gates needed besides the decoder: two OR gates, one XOR gate and one AND gate.
Check: A=1, B=1, =0: , , so and ; correct ().
(With a 3×8 decoder, the usual method , would need no XOR gate.)
✓ Answer checked by Claude Opus 5.5 (high effort)
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