K-map Σ(0,1,4,8,10,11,12)+d, NAND-only

Given $F(A,B,C,D) = \Sigma m(0,1,4,8,10,11,12) + d(2,3,6,9,15)$.

K-map simplification

        CD
AB      00  01  11  10
      +---+---+---+---+
 00   | 1 | 1 | X | X |
      +---+---+---+---+
 01   | 1 | 0 | 0 | X |
      +---+---+---+---+
 11   | 1 | 0 | X | 0 |
      +---+---+---+---+
 10   | 1 | X | 1 | 1 |
      +---+---+---+---+

Groups (don't-cares 2, 3, 9 complete the octet; 6 and 15 are not used):

• Octet m(0,1,2,3,8,9,10,11) → $\overline{B}$
• Quad m(0,4,8,12) → $\overline{C}\,\overline{D}$

$$F = \overline{B} + \overline{C}\,\overline{D}$$

Check: the octet covers 0, 1, 8, 10, 11 and the quad covers 0, 4, 8, 12.

Conversion to NAND gates only

$$\begin{aligned} F &= \overline{\overline{\overline{B}+\overline{C}\,\overline{D}}} \\ &= \overline{B\cdot\overline{\overline{C}\,\overline{D}}} \end{aligned}$$

So $F$ = NAND($B$, NAND($\overline{C}$, $\overline{D}$)). The complements $\overline{C}$ and $\overline{D}$ come from NAND gates with tied inputs. The single literal $\overline{B}$ enters the output NAND as plain $B$.

C ──[NAND]── C'   (inputs tied)
D ──[NAND]── D'   (inputs tied)

C', D' ──[NAND]── P1  ─┐
                       ├──[NAND]── F
B      ──────────     ─┘

Total: 4 two-input NAND gates (two as inverters).