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FDNR to avoid inductors; design from Figure 1 at 10⁴ rad/s

Short answer

Bruton transform the Chebyshev ladder (Rs=1 Ω, L1=2.024 H, C1=0.994 F, L2=2.024 H, RL=1 Ω) and scale to10⁴ rad/s with Ct=10 nF (kz=10 kΩ). Series resistors20.24 kΩ each. Shunt FDNR D=0.994 via GIC with C=10 nF, RD=9.94 kΩ. DC paths: Ra=1 MΩ, Rb≈1.026 MΩ.

What is frequency dependent negative resistor (FDNR)? How can it be used to avoid inductors in Lowpass LC ladder circuit? Explain. From the circuit given in figure 1 design the lowpass filter having ωo = 10⁴ rad/s and practical element values using FDNR. [Figure 1: source V1, R1 = 1 Ω, series L1 = 2.024 H, shunt C1 = 0.994 F, series L2 = 2.024 H, load R2 = 1 Ω]

FDNR

A frequency dependent negative resistor (FDNR) is a one-port with impedance Z(s)=1s2DZ(s) = \dfrac{1}{s^2D}. At s=jωs = j\omega, Z=−1ω2DZ = -\dfrac{1}{\omega^2 D}: a real, negative resistance whose size falls as 1/ω21/\omega^2. DD (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.

Avoiding inductors in a lowpass LC ladder

Bruton transformation: divide every impedance of the RLC ladder by ss (more generally by ksks). A voltage transfer function is a ratio of impedances, so it does not change:

ElementImpedanceAfter dividing by ssNew element
Resistor RRRRR/sR/scapacitor C=1/RC = 1/R
Inductor LLsLsLLLresistor R=LR = L
Capacitor CC1/sC1/sC1/(s2C)1/(s^2C)FDNR D=CD = C

In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.

In the Antoniou GIC (two op-amps, five impedances Z1Z_1 to Z5Z_5 in a chain with Z5Z_5 grounded, so that Zin=Z1Z3Z5/(Z2Z4)Z_{in} = Z_1Z_3Z_5/(Z_2Z_4)), put capacitors in positions 1 and 5 (Z1=1/sC1Z_1 = 1/sC_1, Z5=1/sC5Z_5 = 1/sC_5) and resistors in 2, 3, 4:

Zin=R3s2C1C5R2R4=1s2D,D=C1C5R2R4R3Z_{in} = \frac{R_3}{s^2 C_1 C_5 R_2 R_4} = \frac{1}{s^2 D}, \qquad D = \frac{C_1 C_5 R_2 R_4}{R_3}

With C1=C5=CC_1 = C_5 = C and R2=R3=R4=RR_2 = R_3 = R_4 = R: D=C2RD = C^2 R. At s=jωs = j\omega, Zin=−1/(ω2D)Z_{in} = -1/(\omega^2 D), a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).

Design from Figure 1, ω0\omega_0 = 10⁴ rad/s

Prototype (Figure 1): R1=1 ΩR_1 = 1\ \Omega, series L1=2.024L_1 = 2.024 H, shunt C1=0.994C_1 = 0.994 F, series L2=2.024L_2 = 2.024 H, R2=1 ΩR_2 = 1\ \Omega (a 3rd-order Chebyshev ladder). Numbering the elements 1, 2, 3 from the source:

Step 1: Bruton transformation (divide all impedances by ss): source and load resistors (1 Ω) become 1 F capacitors, each inductor LL becomes a resistor of LL Ω, each shunt capacitor CC becomes a grounded FDNR with D=CD = C.

Step 2: Scaling. Frequency scaling factor ω0=104 rad/s\omega_0 = 10^4\ \text{rad/s}. Choose the terminating capacitors as CtC_t = 10 nF, so

kz=1ω0Ct=110000×1×10−8=10000 Ωk_z = \frac{1}{\omega_0 C_t} = \frac{1}{10000 \times 1 \times 10^{-8}} = 10000\ \Omega Rnew=kzR,Cnew=Ckz ω0,Dnew=Dkz ω02\begin{aligned} R_{new} &= k_z R, \qquad C_{new} = \frac{C}{k_z\,\omega_0}, \qquad D_{new} = \frac{D}{k_z\,\omega_0^2} \end{aligned}

Step 3: Element values. Each FDNR is a GIC with C1=C5=CC_1 = C_5 = C and R2=R3=R4=RDR_2 = R_3 = R_4 = R_D, so D=C2RDD = C^2R_D. Taking C=CtC = C_t gives RD=Dnew/Ct2=kzDR_D = D_{new}/C_t^2 = k_z D.

PrototypeAfter BrutonScaledFinal element
Rs=1 ΩR_s = 1\ \OmegaCs=1C_s = 1 F1/(kzω0)1/(k_z\omega_0)10 nF
L1=2.024L_1 = 2.024 H (series)R1=2.024 ΩR_1 = 2.024\ \OmegaR1=2.024×10000R_1 = 2.024 \times 1000020.24 kΩ
C2=0.994C_2 = 0.994 F (shunt)FDNR D2=0.994D_2 = 0.994D2=0.994/(kzω02)=9.94×10−13D_2 = 0.994/(k_z\omega_0^2) = 9.94 \times 10^{-13}GIC: C = 10 nF, RDR_D = 9.94 kΩ
L3=2.024L_3 = 2.024 H (series)R3=2.024 ΩR_3 = 2.024\ \OmegaR3=2.024×10000R_3 = 2.024 \times 1000020.24 kΩ
RL=1 ΩR_L = 1\ \OmegaCL=1C_L = 1 F1/(kzω0)1/(k_z\omega_0)10 nF

Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put RaR_a across the source capacitor and RbR_b across the load capacitor. They must be much larger than kzk_z (the capacitor impedance at ω0\omega_0). At DC the FDNRs are open, so the DC gain is Rb/(Ra+ΣR+Rb)R_b/(R_a + \Sigma R + R_b). To keep the prototype DC gain of 1/2, set Rb=Ra+ΣRR_b = R_a + \Sigma R:

RaR_a = 1 MΩ, ΣR\Sigma R = 40.48 kΩ, so RbR_b = 1.04 MΩ.

Final circuit (Cs∥RaC_s \| R_a in series from the source, CL∥RbC_L \| R_b as the load, each DkD_k a GIC FDNR to ground):

Vi o--[Cs||Ra]--[R1]-+----[R3]-+----o Vo
                     |         |
                    [D2]    [CL||Rb]
GND ------------------------------------

Answer: terminating capacitors 10 nF; series resistors 20.24 kΩ each; FDNR = GIC with C = 10 nF and RDR_D = 9.94 kΩ; RaR_a = 1 MΩ, RbR_b = 1.04 MΩ.

✓ Answer checked by Claude Sonnet 5.5

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