Chapter 8 · 6 hours
Design of High-Order Active Filters
IOE past exam questions
Past questions and answers
42 questions set from this chapter, 6 of them more than once. Most asked first.
- Asked 7 times
- 2083 Baisakh · 2+4 marks
- 2075 Asoj · 5 marks
- 2073 Shrawan · 5 marks
- 2071 Shrawan · 6 marks
- 2070 Chaitra · 5 marks
- 2081 Bhadra · 4 marks
- 2080 Bhadra · 5 marks
What is GIC (Antoniou's GIC)? How can a GIC be used to simulate a grounded inductor (in the passive filter)? Explain with necessary figures and derivations.
Answer
GIC (Antoniou's GIC)
The GIC (Antoniou's generalized impedance converter) is a two-op-amp circuit with five impedances in a chain. Its input impedance is
By choosing which 's are resistors and which are capacitors, it can simulate a grounded inductor or an FDNR.
Iin -->
V1 o-----+---------- A1 input
|
Z1
|
+---------- A1 output (Va)
Z2
|
(3) +---------- A1 and A2 inputs
Z3
|
+---------- A2 output (Vb)
Z4
|
(5) +---------- A2 input
Z5
|
GND
Op-amp A1 has its inputs at nodes 1 and 3; A2 has its inputs at nodes 3 and 5.
Derivation (ideal op-amps: virtual short gives ; no input current):
Simulating a grounded inductor
Grounded inductor simulation: make and resistors:
(Equally, can be the capacitor, giving .) With all resistors equal to , . One end of the simulated inductor is ground, so the GIC replaces the shunt (grounded) inductors of an LC ladder, e.g. in a high-pass ladder.
Example: H with F and : .
Advantages: the realized inductor has high Q and low sensitivity to op-amp gain; it uses only R, C and op-amps, so the low-sensitivity property of the passive LC ladder is kept.
- Asked 2 times
- 2078 Bhadra · 2+3+5 marks
- 2079 Bhadra · 2+3+5 marks
What is generalized impedance converter (GIC)? How can you simulate the grounded inductor in the passive filter using GIC? Realize the following passive filter to be active simulation of grounded inductors. Use frequency scale factor Kf = 2000 and also perform the magnitude scale to get practically realizable element values in your final circuit. [Figure: high pass ladder - voltage source with series source resistor (value not legible), series 1.618 F capacitor, shunt 618 mH inductor, series 500 mF capacitor, shunt 618 mH inductor, series 1.618 F capacitor, 1 kΩ load resistor]
Answer
Generalized impedance converter (GIC)
The GIC (Antoniou's generalized impedance converter) is a two-op-amp circuit with five impedances in a chain. Its input impedance is
By choosing which 's are resistors and which are capacitors, it can simulate a grounded inductor or an FDNR.
Iin -->
V1 o-----+---------- A1 input
|
Z1
|
+---------- A1 output (Va)
Z2
|
(3) +---------- A1 and A2 inputs
Z3
|
+---------- A2 output (Vb)
Z4
|
(5) +---------- A2 input
Z5
|
GND
Op-amp A1 has its inputs at nodes 1 and 3; A2 has its inputs at nodes 3 and 5.
Derivation (ideal op-amps: virtual short gives ; no input current):
Simulating a grounded inductor with a GIC
Grounded inductor simulation: make and resistors:
(Equally, can be the capacitor, giving .) With all resistors equal to , . One end of the simulated inductor is ground, so the GIC replaces the shunt (grounded) inductors of an LC ladder, e.g. in a high-pass ladder.
Example: H with F and : .
Active simulation of the given high-pass ladder
The values (C 1.618, L 0.618, C 0.5, L 0.618, C 1.618) are the 5th-order Butterworth high-pass ladder obtained from the low-pass prototype 0.618, 1.618, 2, 1.618, 0.618. Assumption: the prototype is normalized with (the source resistor is not legible); the 1 kΩ in the figure matches the impedance scaling chosen below.
Scaling: (rad/s), and choose :
| Element | Normalized | Scaled |
|---|---|---|
| , | 1 Ω | 1 kΩ |
| , (series) | 1.618 F | 0.809 μF |
| , (shunt) | 0.618 H | 0.309 H |
| (series) | 0.5 F | 0.25 μF |
Replace each grounded 0.309 H inductor by a GIC with : . Choose F and :
Vs-1k-+-0.809uF-+-0.25uF-+-0.809uF-+--+
| | | | |
[GIC] [GIC] 1k
0.309H 0.309H |
| | |
GND ------------+----------------+----+
Final circuit: ; series capacitors 0.809 μF, 0.25 μF, 0.809 μF; two GICs, each with , , F. The filter is a 5th-order Butterworth high-pass with cutoff rad/s (318.3 Hz) and no inductors.
- Asked 2 times
- 2075 Chaitra · 1+4 marks
- 2074 Chaitra · 1+4 marks
What is (ideal) gyrator? How can you simulate inductor using gyrator? Explain with necessary derivation.
Answer
Ideal gyrator
An ideal gyrator is a lossless two-port that converts a voltage at one port into a proportional current at the other. With gyration conductance (gyration resistance ):
I1 -> <- I2
o------+ +---------+ +------o
V1 |--| gyrator |--| V2
o------+ | g | +------o
+---------+
It is non-reciprocal and inverts impedance: a load at port 2 appears at port 1 as .
Simulating an inductor
Terminate port 2 with a capacitor . The load current is , and it leaves port 2, so .
So the input looks like an inductor
o----+ +---------+ +----+
|--| gyrator |--| === C => L = r^2 C
o----+ +---------+ +----+
Example: , F gives H.
Practical realization: a gyrator is built with two voltage-controlled current sources of opposite sign (transconductance ), or with op-amps (e.g. the Riordan circuit, a form of GIC).
Grounded vs floating: one gyrator with a grounded C gives a grounded inductor. A floating inductor needs two gyrators connected back to back with a grounded capacitor between them, giving between the two outer terminals.
Simulated inductors are small, have high Q and can be integrated, so a passive LC ladder can be converted to an active RC filter while keeping its low sensitivity.
- Asked 2 times
- 2081 Bhadra · 2+4 marks
- 2083 Baisakh · 6 marks
What is Bruton Transformation? Design (simulate) the 4th order Butterworth low pass filter in resistively terminated lossless network with half power frequency 2,000 rad/sec and practically realizable elements using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Bruton transformation
The Bruton transformation scales every impedance of an LC ladder by (i.e. by ). The transfer function (a ratio of impedances) does not change, but the element types change:
| Original | Impedance ÷ s | New element |
|---|---|---|
| Resistor R | Capacitor | |
| Inductor L | Resistor | |
| Capacitor C | FDNR |
The FDNR (frequency-dependent negative resistance) has impedance , which is on the axis. All inductors become resistors and the shunt capacitors become grounded FDNRs, which are easy to build with a GIC.
Design: 4th-order Butterworth LPF, rad/s
Prototype (table, ): series , shunt , series , shunt .
After the Bruton transformation (normalized):
- F; F
- ;
- ;
Scaling: , choose (so becomes 0.1 μF):
FDNR by GIC: in , make , and the rest resistors:
Take F and , so :
Vin-+-||-+-3.83k-+--9.24k-+--+-- Vout
|0.1uF | | |
[FDNR D2] [FDNR D4] === 0.1uF
| | |
GND -------------+--------+--+
DC path: the series 0.1 μF source capacitor blocks DC bias for the op-amps, so add large bleeding resistors (e.g. 1 MΩ) across the source capacitor and from output to ground. With equal values they keep the DC gain at about 0.5, as in the original ladder.
| Element | Final value |
|---|---|
| Source and load capacitors | 0.1 μF each |
| Series resistors | 3.827 kΩ, 9.24 kΩ |
| FDNR (GIC) | F, kΩ, kΩ |
| FDNR (GIC) | F, kΩ, kΩ |
| Bleeding resistors | 1 MΩ each |
Answer: the inductorless filter has half-power frequency 2000 rad/s, a 4th-order Butterworth response and only practical R, C and op-amp elements.
- Asked 2 times
- 2082 Bhadra · 6 marks
- 2082 Baisakh · 6 marks
Design the fourth order Butterworth low-pass filter in resistively terminated lossless realization using a leapfrog simulation. Your final design should accommodate half power frequency of 1000 rad/sec and should have practically realizable elements in it. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 0.7654 F | |
| A2 | integrator | , | 1.848 F | |
| A3 | inverter | R / R | ||
| A4 | integrator | , | 1.848 F | |
| A5 | lossy integrator | 0.7654 F | ||
| A6 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 76.54 nF |
| A2 | input(s) 10 kΩ | 184.8 nF |
| A4 | input(s) 10 kΩ | 184.8 nF |
| A5 | input(s) 10 kΩ, feedback 10 kΩ across C | 76.54 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: six op-amps (four integrators, two inverters), all resistors 10 kΩ, integrator capacitors 76.54 nF, 184.8 nF, 184.8 nF and 76.54 nF; half-power frequency 1000 rad/s.
- Asked 2 times
- 2081 Baisakh · 8 marks
- 2081 Bhadra · 7 marks
Design (simulate) the 4th order Butterworth LPF in doubly-terminated (resistively-terminated lossless) network using Leapfrog simulation. The necessary information is listed in the given table: Order (n) = 4 and LPF; R1 = 1; L1 = 0.7654; C2 = 1.848; L3 = 1.848; C4 = 0.7654; R2 = 1
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
Given prototype (normalised to 1 rad/s, 1 Ω terminations): , H, F, H, F, .
Vin 1 Ohm L1=0.7654 L3=1.848
o---[R1]---(LLL)--+---(LLL)--+------o Vo
| | |
C2=1.848 C4=0.7654 [R2=1]
| | |
GND --------------+----------+----+
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 0.7654 F | |
| A2 | integrator | , | 1.848 F | |
| A3 | inverter | R / R | ||
| A4 | integrator | , | 1.848 F | |
| A5 | lossy integrator | 0.7654 F | ||
| A6 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 12.18 nF |
| A2 | input(s) 10 kΩ | 29.41 nF |
| A4 | input(s) 10 kΩ | 29.41 nF |
| A5 | input(s) 10 kΩ, feedback 10 kΩ across C | 12.18 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Since no frequency is given, the normalised design (all R = 1 Ω, C = 0.7654, 1.848, 1.848, 0.7654 F) is the answer; the 1 kHz values above show how it is made practical.
Answer (1 kHz example): R = 10 kΩ everywhere, capacitors 12.18 nF, 29.41 nF, 29.41 nF, 12.18 nF.
- 2081 Bhadra · 5 marks
What is GIC? How can it be used to avoid shunt inductors in LC ladder circuit?
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
GIC circuit and input impedance
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Avoiding shunt inductors
Put a capacitor in position 4 () and resistors elsewhere:
With all resistors equal to : . One end of this inductor is ground, so it replaces a grounded (shunt) inductor.
In an LC ladder the shunt inductors (for example in a highpass ladder, where every inductor goes from a node to ground) are exactly such grounded inductors. The procedure is:
- Obtain the passive ladder (prototype values, then frequency and impedance scaling).
- Keep the resistors and capacitors as they are.
- Replace each shunt inductor by a GIC: choose (e.g. 10 nF) and .
o--[Rs]--||--+--||--+--||--o Vo
| | |
[GIC] [GIC] [RL]
| | |
GND ---------+------+------+
Example: a shunt inductor of 0.1 H with = 10 nF needs = 3.162 kΩ in positions 1, 2, 3 and 5.
Advantages: no bulky, lossy inductors; the ladder's low sensitivity is kept; elements are easy to integrate. Floating (series) inductors cannot be replaced by one grounded GIC; for those, use two GICs or the Bruton/FDNR method.
- 2079 Baisakh · 5 marks
What is GIC? How GIC can be used to simulate the floating inductor in the passive filter? Explain.
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
Input impedance of the GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Grounded inductor
With and all other positions resistors : , i.e. . This works only when one end of the inductor is grounded.
Floating inductor using two GICs
A series (floating) inductor, as in a lowpass ladder, has neither end grounded. It is simulated by two identical GICs connected back to back with a resistor between their port-2 terminals:
a o--[GIC 1]--o x --[ Rx ]-- y o--[GIC 2]--o b
port1 port2 port2 port1
(GIC 2 is the same circuit, reversed)
Treat the GIC with removed as a two-port (port 2 at node 5). From the analysis above, and , with . With and equal resistors, . In transmission (ABCD) form:
This is the matrix of a single series (floating) impedance , so between a and b we get a floating inductor
Example: = 10 nF, = 10 kΩ gives = 1 H. The two GICs must be well matched; a mismatch leaves a small unwanted grounded element. (The Bruton/FDNR method is the usual alternative for lowpass ladders.)
- 2072 Chaitra · 5 marks
Draw the circuit diagram of a generalized impedance converter. Derive the relationship between input and output current. How can it be used to simulate a grounded FDNR? Explain.
Answer
GIC circuit
The generalized impedance converter (GIC) (Antoniou circuit) uses two op-amps and five impedances in a chain from the input to ground:
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
Relation between input and output current
Treat node 1 as port 1 (, ) and node 5 as port 2, where the load draws current (). Ideal op-amps force node 1, node 3 and node 5 to the same voltage and draw no input current, so . Let and be the voltages of nodes 2 and 4 (op-amp outputs).
So the GIC passes voltage unchanged and scales current:
Grounded FDNR
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Practical design: choose (e.g. 10 nF), then . Example: with = 10 nF gives = 10 kΩ. Because port 1 is referred to ground, this FDNR is grounded, which is exactly what the Bruton-transformed lowpass ladder needs (shunt capacitors become grounded FDNRs).
- 2074 Asoj · 4+4 marks
What is generalized impedance converter (GIC)? Explain how inductors can be simulated using GIC? Simulate the following highpass filter by active simulation of grounded inductors such that ω0 is 4000 rad/s and practically realizable elements. [Figure: source V1, 1 Ω source resistor, series 1.618 F, shunt 0.618 H, series 0.5 F, shunt 0.618 H, series 1.618 F, 1 Ω load (output V2)]
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
Simulating a grounded inductor with a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put a capacitor in position 4 () and resistors elsewhere:
With all resistors equal to : . One end of this inductor is ground, so it replaces a grounded (shunt) inductor.
Design
The given ladder is a 5th-order Butterworth highpass prototype ( rad/s, 1 Ω terminations): series 1.618 F, shunt 0.618 H, series 0.5 F, shunt 0.618 H, series 1.618 F. Both inductors are grounded, so each is replaced by a GIC.
Frequency scale to and impedance scale by (chosen as so that capacitors are in the nF range):
, so the source and load resistors become = 10 kΩ.
| Prototype | Scaled | Final |
|---|---|---|
| = 1.618 F (series) | 40.45 nF | |
| = 0.618 H (shunt) | = 1.545 H | GIC: C = 10 nF, = 12.43 kΩ |
| = 0.5 F (series) | 12.5 nF | |
| = 0.618 H (shunt) | = 1.545 H | GIC: C = 10 nF, = 12.43 kΩ |
| = 1.618 F (series) | 40.45 nF | |
| = 1 Ω | 10 kΩ |
Each grounded inductor is replaced by a GIC with and , so and .
Final circuit (each GIC realises the grounded inductor in that position):
Vi o--[Rs]--[C1]-+----[C3]-+----[C5]-+----o Vo
| | |
[GIC-L2] [GIC-L4] [RL]
GND ------------------------------------------
Answer: = 10 kΩ; series capacitors 40.45 nF, 12.5 nF, 40.45 nF; each simulated inductor 1.545 H = GIC with C = 10 nF and four resistors of 12.43 kΩ; = 4000 rad/s.
- 2081 Baisakh · 1+3+5 marks
What is a generalized impedance converter (GIC)? How can you simulate the grounded inductor using GIC? From the LC ladder given in figure below, design a highpass filter with a half power frequency of 5 kHz and the largest capacitance of 10nF using inductor simulation. [Figure: source V1, 1 Ω source resistor, series 1.618 F, shunt 0.618 H, series 0.5 F, shunt 0.618 H, series 1.618 F, 1 Ω load (output V2)]
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
Simulating a grounded inductor with a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put a capacitor in position 4 () and resistors elsewhere:
With all resistors equal to : . One end of this inductor is ground, so it replaces a grounded (shunt) inductor.
Design
The ladder is the 5th-order Butterworth highpass prototype (1 rad/s, 1 Ω): series 1.618 F, shunt 0.618 H, series 0.5 F, shunt 0.618 H, series 1.618 F. The shunt inductors are grounded and are simulated by GICs.
Frequency scale to and impedance scale by (chosen so that the largest capacitor, 1.618 F, becomes 10 nF: ):
, so the source and load resistors become = 5.15 kΩ.
| Prototype | Scaled | Final |
|---|---|---|
| = 1.618 F (series) | 10 nF | |
| = 0.618 H (shunt) | = 101.3 mH | GIC: C = 10 nF, = 3.183 kΩ |
| = 0.5 F (series) | 3.09 nF | |
| = 0.618 H (shunt) | = 101.3 mH | GIC: C = 10 nF, = 3.183 kΩ |
| = 1.618 F (series) | 10 nF | |
| = 1 Ω | 5.15 kΩ |
Each grounded inductor is replaced by a GIC with and , so and .
Final circuit (each GIC realises the grounded inductor in that position):
Vi o--[Rs]--[C1]-+----[C3]-+----[C5]-+----o Vo
| | |
[GIC-L2] [GIC-L4] [RL]
GND ------------------------------------------
Answer: = 5.15 kΩ; capacitors 10 nF, 3.09 nF, 10 nF; each 101.3 mH inductor = GIC with C = 10 nF and R = 3.183 kΩ; half-power frequency 5 kHz.
- 2069 Chaitra · 2+4+6 marks
What is generalized impedance converter (GIC)? How can you simulate the grounded inductor in the passive filter using GIC? Explain. The following circuit is a high pass filter having half power frequency of 1 rad/sec. Design a high pass filter having half power frequency of 4.5 kHz by active simulation of inductors. In your final circuit the largest capacitance should be 0.1 μF. [Figure: source V1, 1 Ω source resistor, shunt 1.618 H, series 0.618 F, shunt 0.5 H, series 0.618 F, shunt 1.618 H, 1 Ω load (output V2)]
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
Simulating a grounded inductor with a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put a capacitor in position 4 () and resistors elsewhere:
With all resistors equal to : . One end of this inductor is ground, so it replaces a grounded (shunt) inductor.
Design
The given ladder is a 5th-order Butterworth highpass (1 rad/s, 1 Ω): shunt 1.618 H, series 0.618 F, shunt 0.5 H, series 0.618 F, shunt 1.618 H. All three inductors are grounded, so three GICs are needed.
Frequency scale to and impedance scale by (chosen so that the largest capacitor, 0.618 F, becomes 0.1 μF: ):
, so the source and load resistors become = 218.6 Ω.
| Prototype | Scaled | Final |
|---|---|---|
| = 1.618 H (shunt) | = 12.51 mH | GIC: C = 100 nF, = 353.7 Ω |
| = 0.618 F (series) | 100 nF | |
| = 0.5 H (shunt) | = 3.865 mH | GIC: C = 100 nF, = 196.6 Ω |
| = 0.618 F (series) | 100 nF | |
| = 1.618 H (shunt) | = 12.51 mH | GIC: C = 100 nF, = 353.7 Ω |
| = 1 Ω | 218.6 Ω |
Each grounded inductor is replaced by a GIC with and , so and .
Final circuit (each GIC realises the grounded inductor in that position):
Vi o--[Rs]-+----[C2]-+----[C4]-+-------+----o Vo
| | | |
[GIC-L1] [GIC-L3] [GIC-L5] [RL]
GND --------------------------------------------
Answer: = 218.6 Ω; series capacitors 0.1 μF each; simulated inductors 12.51 mH, 3.865 mH, 12.51 mH, realised by GICs with C = 0.1 μF and R = 353.7 Ω, 196.6 Ω, 353.7 Ω; half-power frequency 4.5 kHz.
- 2076 Chaitra · 1+3+4 marks
What is GIC? How can you simulate a grounded inductor? Design a fourth order Butterworth highpass filter having ωo = 16,000 rad/s and practically suitable elements using simulated inductors. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
A generalized impedance converter (GIC) is an active two-port, usually Antoniou's two-op-amp, five-impedance circuit. Its input impedance is the load impedance multiplied by a conversion function . By choosing which positions hold capacitors, a GIC can make an inductor or an FDNR from only R, C and op-amps.
Simulating a grounded inductor with a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put a capacitor in position 4 () and resistors elsewhere:
With all resistors equal to : . One end of this inductor is ground, so it replaces a grounded (shunt) inductor.
Design
Step 1: Lowpass prototype (table, n = 4): series H, shunt F, series H, shunt F, 1 Ω terminations.
Step 2: LP to HP transformation (): each series L becomes a series capacitor , each shunt C becomes a shunt (grounded) inductor :
| Lowpass | Highpass element |
|---|---|
| H | F (series) |
| F | H (shunt) |
| H | F (series) |
| F | H (shunt) |
Step 3: Scaling (both inductors are grounded, so they are simulated by GICs).
Frequency scale to and impedance scale by (chosen as ):
, so the source and load resistors become = 10 kΩ.
| Prototype | Scaled | Final |
|---|---|---|
| = 1.3065 F (series) | 8.166 nF | |
| = 0.5411 H (shunt) | = 338.2 mH | GIC: C = 10 nF, = 5.815 kΩ |
| = 0.5411 F (series) | 3.382 nF | |
| = 1.3065 H (shunt) | = 816.6 mH | GIC: C = 10 nF, = 9.036 kΩ |
| = 1 Ω | 10 kΩ |
Each grounded inductor is replaced by a GIC with and , so and .
Final circuit:
Vi o--[Rs]--[C1]-+----[C3]-+-------+----o Vo
| | |
[GIC-L2] [GIC-L4] [RL]
GND ----------------------------------------
Answer: = 10 kΩ; series capacitors 8.166 nF and 3.382 nF; = 338.2 mH (GIC: C = 10 nF, R = 5.816 kΩ); = 816.6 mH (GIC: C = 10 nF, R = 9.036 kΩ); = 16,000 rad/s.
- 2082 Baisakh · 1+4 marks
What is ideal gyrator? How can you simulate floating inductor using gyrator? Explain with necessary figure and derivations.
Answer
Ideal gyrator
An ideal gyrator is a lossless two-port that inverts impedance: a load on port 2 appears at port 1 as , where is the gyration resistance. Its defining equations are
So a capacitor on port 2 gives with . A gyrator is built with op-amps (e.g. two voltage-controlled current sources of opposite sign, , , ).
Floating inductor using gyrators
One gyrator with a grounded capacitor gives only a grounded inductor. A floating inductor is made by cascading two identical gyrators with a grounded capacitor between them:
a o---+---------+----+----+---------+---o b
| Gyr. 1 | | | Gyr. 2 |
| (r) | === C | (r) |
| | | | |
GND ---+---------+----+----+---------+---- GND
The transmission (ABCD) matrix of an ideal gyrator (, , with leaving port 2) and of a shunt capacitor are
For the cascade:
The matrix is that of a single series impedance between the two terminals. Here , so the circuit between a and b is a floating inductor
Example: = 10 kΩ and = 10 nF give = 1 H. The two gyrators must have equal gyration resistance; any mismatch leaves an unwanted grounded element. The capacitor is grounded, which suits IC realisation.
- 2079 Bhadra · 3+5 marks
What is Bruton transformation? Design the 4th order Butterworth low pass filter with half power frequency 20,000 rad/s and practically realizable elements using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Bruton transformation
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
Design: 4th-order Butterworth LPF, = 20,000 rad/s
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 3.827 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 9.24 kΩ | |
| H (series) | 9.24 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 3.827 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 13.07 kΩ, so = 113.1 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer: source and load capacitors 10 nF; series resistors 3.827 kΩ and 9.24 kΩ; FDNRs (GIC with C = 10 nF, = 9.24 kΩ) and (C = 10 nF, = 3.827 kΩ); = 100 kΩ, = 113.1 kΩ.
- 2082 Bhadra · 2+4 marks
What is Bruton Transformation? How can you simulate grounded inductor using FDNR? Explain with necessary figures and derivations.
Answer
Bruton transformation
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
Simulating the inductor problem with FDNR
A lowpass LC ladder has inductors in the series arms. Inductors are bulky, lossy and cannot be integrated. After the Bruton transformation (all impedances divided by ):
- each inductor becomes a resistor (no inductor left),
- each grounded capacitor becomes a grounded FDNR ,
- each terminating resistor becomes a capacitor .
So the inductor is "simulated" indirectly: the whole network is converted to R, C and grounded FDNRs with the same voltage transfer function.
Original: o-[Rs]-(L1)-+-(L3)-+---o
C2 C4 [RL]
Bruton: o-[Cs]-[R1]-+-[R3]-+---o
D2 D4 [CL]
Realising the FDNR with a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Practical points
- Because the terminations become capacitors, there is no DC path; resistors (across the source capacitor) and (across the load capacitor) are added, much larger than the capacitor impedances in the passband, with to keep the DC gain at 1/2.
- Only grounded FDNRs are needed, so one GIC per shunt capacitor is enough, and the low sensitivity of the ladder is kept.
- 2072 Kartik · 6 marks
What is the importance of Bruton transformation in filter design? How can you simulate FDNR using generalized impedance converter (GIC)? Explain with example.
Answer
Importance of the Bruton transformation
The Bruton transformation divides every impedance of an RLC ladder by : capacitor , resistor , FDNR . Because a voltage transfer function is a ratio of impedances, it is unchanged. Its importance:
- Removes all inductors, including floating (series) ones in lowpass ladders, which are hard to simulate directly.
- The only active elements needed are grounded FDNRs, each made with one GIC; floating elements are avoided.
- The design starts from a doubly terminated LC ladder, so the very low sensitivity of the ladder to element changes is kept.
- The final circuit has only resistors, capacitors and op-amps, suitable for integration and for low frequencies where inductors would be huge.
- Extra care: a DC path must be added (large resistors across the terminating capacitors).
FDNR using a GIC
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
With ideal op-amps the two input terminals of each op-amp are at the same voltage and draw no current, so .
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Example
Third-order Butterworth LPF (prototype , H, F, H, ) at = 10,000 rad/s.
- Bruton: F, , , , F.
- Choose = 10 nF: .
- Resistors: = 10 kΩ. Terminating capacitors 10 nF.
- ; with GIC capacitors 10 nF, = 20 kΩ.
- DC path: = 1 MΩ, kΩ = 1.02 MΩ.
Vi o--[10nF||Ra]--[10k]--+--[10k]--+---o Vo
| |
[GIC D2] [10nF||Rb]
GND ---------------------+---------+
- 2080 Bhadra · 4+6 marks
What is FDNR? How can you use FDNR to avoid the inductor in filter design? Explain. Design third order Butterworth low pass filter having half power frequency 4000 rad/s using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Using FDNR to avoid inductors
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
The FDNR itself is a GIC: Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Design: 3rd-order Butterworth LPF, = 4000 rad/s
From the table (n = 3): , H (series), F (shunt), H (series), .
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 100 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 100 nF | ||
| H (series) | 2.5 kΩ | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 5 kΩ | |
| H (series) | 2.5 kΩ | ||
| F | 100 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 5 kΩ, so = 105 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+----o Vo
| |
[D2] [CL||Rb]
GND ------------------------------------
Answer: terminating capacitors 0.1 μF; = 2.5 kΩ; FDNR = GIC with C = 0.1 μF and = 5 kΩ; = 100 kΩ, = 105 kΩ.
- 2080 Baisakh · 1+3+5 marks
What is frequency dependent negative resistor (FDNR)? How can it be realized? Realize the following passive filter using FDNR, having ωo = 25000 rad/s and practical element values in your final circuit. [Figure: Butterworth filter at normalized frequency - source V with 1 Ω series resistor, series 0.618 H, shunt 1.618 F, series 2 H, shunt 1.618 F, series 0.618 H, 1 Ω load]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Realisation
The FDNR is realised with a GIC (Antoniou circuit):
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Design: 5th-order Butterworth LPF, = 25,000 rad/s
Given prototype: , H, F, H, F, H, .
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 2.472 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 6.472 kΩ | |
| H (series) | 8 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 6.472 kΩ | |
| H (series) | 2.472 kΩ | ||
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 12.94 kΩ, so = 112.9 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+----[R5]-+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND ----------------------------------------------
Answer: terminating capacitors 10 nF; series resistors 2.472 kΩ, 8 kΩ, 2.472 kΩ; two FDNRs, each a GIC with C = 10 nF and = 6.472 kΩ; = 100 kΩ, = 112.9 kΩ.
- 2079 Baisakh · 5 marks
Design a fourth order Butterworth low pass filter having half power frequency of 16000 rad/s using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
The inductors of the doubly terminated ladder are removed with the Bruton transformation, and the shunt capacitors become grounded FDNRs () made with GICs.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 4.784 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 11.55 kΩ | |
| H (series) | 11.55 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 4.784 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 16.33 kΩ, so = 116.3 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer: terminating capacitors 10 nF; series resistors 4.784 kΩ and 11.55 kΩ; FDNRs: = GIC (C = 10 nF, = 11.55 kΩ), = GIC (C = 10 nF, = 4.784 kΩ); = 100 kΩ, = 116.3 kΩ.
- 2075 Asoj · 6 marks
Simulate the Butterworth 4th order low pass filter in resistively-terminated lossless network using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
The inductors of the resistively terminated LC ladder are removed with the Bruton transformation (divide every impedance by ), and the grounded capacitors become FDNRs (), each realised by a GIC.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Normalised FDNR network ( rad/s): source capacitor 1 F, , FDNR , , FDNR , load capacitor 1 F.
No frequency is given, so the design is shown denormalised to a practical example of = 10,000 rad/s:
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 7.654 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 18.48 kΩ | |
| H (series) | 18.48 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 7.654 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 1 MΩ, = 26.13 kΩ, so = 1.026 MΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer (for = 10⁴ rad/s): terminating capacitors 10 nF; series resistors 7.654 kΩ and 18.48 kΩ; FDNR GICs with C = 10 nF and = 18.48 kΩ () and 7.654 kΩ (); = 1 MΩ, = 1.026 MΩ. For any other , use and the same steps.
- 2073 Chaitra · 5+5 marks
What is frequency dependent negative resistor (FDNR)? How can it be used to avoid inductors in Lowpass LC ladder circuit? Explain. From the circuit given in figure 1 design the lowpass filter having ωo = 10⁴ rad/s and practical element values using FDNR. [Figure 1: source V1, R1 = 1 Ω, series L1 = 2.024 H, shunt C1 = 0.994 F, series L2 = 2.024 H, load R2 = 1 Ω]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Avoiding inductors in a lowpass LC ladder
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Design from Figure 1, = 10⁴ rad/s
Prototype (Figure 1): , series H, shunt F, series H, (a 3rd-order Chebyshev ladder). Numbering the elements 1, 2, 3 from the source:
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 20.24 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 9.94 kΩ | |
| H (series) | 20.24 kΩ | ||
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 1 MΩ, = 40.48 kΩ, so = 1.04 MΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+----o Vo
| |
[D2] [CL||Rb]
GND ------------------------------------
Answer: terminating capacitors 10 nF; series resistors 20.24 kΩ each; FDNR = GIC with C = 10 nF and = 9.94 kΩ; = 1 MΩ, = 1.04 MΩ.
- 2072 Chaitra · 6 marks
Design a Fourth order Butterworth low pass filter having half power frequency of 4000 rad/s using Frequency dependent negative resistor (FDNR). [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
The design uses the Bruton transformation to remove the inductors of the doubly terminated Butterworth ladder; the shunt capacitors become grounded FDNRs (), each realised with a GIC.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 100 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 100 nF | ||
| H (series) | 1.913 kΩ | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 4.62 kΩ | |
| H (series) | 4.62 kΩ | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 1.913 kΩ | |
| F | 100 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 6.534 kΩ, so = 106.5 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer: terminating capacitors 0.1 μF; series resistors 1.913 kΩ and 4.62 kΩ; FDNRs: = GIC (C = 0.1 μF, = 4.62 kΩ), = GIC (C = 0.1 μF, = 1.913 kΩ); = 100 kΩ, = 106.5 kΩ.
- 2071 Chaitra · 5 marks
What is Frequency Dependent Negative Resistor? How can it be used to avoid bulky inductors in the design of your circuits? Explain with suitable examples.
Answer
Frequency dependent negative resistor
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Avoiding bulky inductors
Inductors for audio and low frequencies are large, heavy, lossy (low Q), pick up magnetic noise and cannot be put on an IC. The FDNR method removes them:
- Start from the doubly terminated LC ladder (it has the lowest sensitivity).
- Apply the Bruton transformation: divide every impedance by . Then , , FDNR . The voltage transfer function does not change.
- In a lowpass ladder all inductors are in series arms, so they all become ordinary resistors. The shunt capacitors become grounded FDNRs.
- Realise each FDNR with one GIC: capacitors in positions 1 and 5, resistors in 2, 3, 4, giving .
- Add large resistors across the terminating capacitors for a DC path.
Iin node 1
o-->-----+--------------(+) A1
Vin |
[Z1]
+--- node 2 ---- output of A1
[Z2]
+--- node 3 ---- (-) A1 and (-) A2
[Z3]
+--- node 4 ---- output of A2
[Z4]
+--- node 5 ---- (+) A2
[Z5]
|
GND
Example
Third-order Butterworth LPF at = 10,000 rad/s. Prototype: , H, F, H, . Without FDNR the scaled inductors (with ) would be = 1 H each, which is bulky.
With FDNR ( = 10 nF, ):
| Element | Bruton | Final |
|---|---|---|
| 1 F | 10 nF (with = 1 MΩ across it) | |
| = 1 H | 1 Ω | 10 kΩ |
| = 2 F | = 2 | GIC: C = 10 nF, = 20 kΩ |
| = 1 H | 1 Ω | 10 kΩ |
| 1 F | 10 nF (with = 1.02 MΩ across it) |
The 1 H inductors are replaced by 10 kΩ resistors and one GIC.
- 2071 Shrawan · 2+4 marks
What is FDNR? Explain how FDNR avoids the use of inductor. Following circuit is a lowpass filter having half power frequency of 1 rad/sec. Obtain a lowpass filter having half power frequency of 5 kHz and largest capacitor of 0.01 μF using FDNR. [Figure: source V1, 1 Ω source resistor, shunt 0.618 F, series 1.618 H, shunt 2.0 F, series 1.618 H (labelled 1.618 F in the figure), shunt 0.618 F, 1 Ω load (output V2)]
Answer
FDNR and how it avoids inductors
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Using the Bruton transformation (divide all impedances by ), each inductor becomes a resistor , each grounded capacitor becomes a grounded FDNR , and each terminating resistor becomes a capacitor. So the lowpass ladder needs no inductor at all; each FDNR is one GIC with .
Design: 5 kHz, largest capacitor 0.01 μF
The given ladder is a 5th-order Butterworth LPF (π form): shunt F, series H, shunt F, series H (shown as F in the figure; it must be an inductor in a lowpass ladder), shunt F, 1 Ω terminations.
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF (the largest capacitor allowed; all capacitors in the final circuit are 0.01 μF), so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 1.967 kΩ | |
| H (series) | 5.15 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 6.366 kΩ | |
| H (series) | 5.15 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 1.967 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 10.3 kΩ, so = 110.3 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]-+----[R2]-+----[R4]-+-------+----o Vo
| | | |
[D1] [D3] [D5] [CL||Rb]
GND ------------------------------------------------
Answer: all capacitors 0.01 μF; series resistors 5.15 kΩ each; FDNR GICs with C = 0.01 μF and = 1.967 kΩ, 6.366 kΩ, 1.967 kΩ; = 100 kΩ, = 110.3 kΩ.
- 2070 Asar · 3+4 marks
What is FDNR? How FDNR avoids the use of inductor? Explain. Following circuit is a lowpass filter having half power frequency of 1 rad/sec. Obtain a lowpass filter having half power frequency of 4.5 kHz and largest capacitor of 0.1 μF using FDNR. [Figure: source V1, 1 Ω source resistor, series 0.7654 H, shunt 1.848 F, series 1.848 H, shunt 0.7654 F, 1 Ω load (output V2)]
Answer
FDNR and how it avoids inductors
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.
Under the Bruton transformation (all impedances divided by ) a resistor becomes a capacitor, an inductor becomes a resistor and a capacitor becomes an FDNR. A lowpass ladder therefore turns into a network of R, C and grounded FDNRs with the same transfer function, and each FDNR is a GIC (). No inductor remains.
Design: 4.5 kHz, largest capacitor 0.1 μF
Given prototype (4th-order Butterworth, 1 rad/s): series H, shunt F, series H, shunt F, 1 Ω terminations.
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 100 nF (the largest capacitor allowed; all capacitors are made 0.1 μF), so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 100 nF | ||
| H (series) | 270.7 Ω | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 653.6 Ω | |
| H (series) | 653.6 Ω | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 270.7 Ω | |
| F | 100 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 10 kΩ, = 924.3 Ω, so = 10.92 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Answer: all capacitors 0.1 μF; series resistors 270.7 Ω and 653.6 Ω; FDNR GICs with C = 0.1 μF and = 653.6 Ω () and 270.7 Ω (); = 10 kΩ, = 10.92 kΩ.
- 2080 Bhadra · 2+4 marks
Draw the figure of RLC series circuit using FDNR. Use fourth order Butterworth low pass by FDNR with half power = 1×10³ Hz and capacitor in final design = 0.01μF. [Figure: source V1, 1 Ω source resistor, shunt 0.7654 F, series 1.848 H, shunt 1.848 F, series 0.7654 H, 1 Ω load]
Answer
RLC elements using FDNR (Bruton transformation)
Dividing every impedance by keeps the voltage transfer function the same and changes each element as follows:
Element Impedance /s New element
--[ R ]-- R R/s --| C=1/R |--
--(LLL)-- sL L --[ R=L ]--
--| C |-- 1/sC 1/(s^2 C) --[FDNR D=C]--
So a series R–L–C branch becomes a series C–R–FDNR branch:
Before: o--[ R ]--(LLL)--| C |--o
After: o--| 1/R |--[ L ]--[D = C]--o
In a lowpass ladder the capacitors are grounded, so the FDNRs are grounded and each is one GIC ().
Design: 4th-order Butterworth LPF, 1 kHz, capacitors 0.01 μF
Given ladder (1 rad/s, 1 Ω): shunt F, series H, shunt F, series H, load 1 Ω.
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF (all capacitors in the final design), so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 12.18 kΩ | |
| H (series) | 29.41 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 29.41 kΩ | |
| H (series) | 12.18 kΩ | ||
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 1 MΩ, = 41.59 kΩ, so = 1.042 MΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]-+----[R2]-+----[R4]-+----o Vo
| | |
[D1] [D3] [CL||Rb]
GND ----------------------------------------
Answer: all capacitors 0.01 μF; series resistors 29.41 kΩ and 12.18 kΩ; FDNR GICs with C = 0.01 μF and = 12.18 kΩ () and 29.41 kΩ (); = 1 MΩ, = 1.042 MΩ.
- 2080 Baisakh · 2+3+5 marks
What is FDNR? How can FDNR be used to avoid the inductor in passive filter? Simulate the Butterworth 5th order lowpass filter using FDNR referring table below. Your final design should have ωo = 10,000 rad/s and practically realizable elements. [Table: Order (n) = 5; R1 = R2 = 1; L1 = 0.6180; C2 = 1.618; L3 = 2.000; C4 = 1.618; L5 = 0.6180]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It is realised with a GIC containing two capacitors.
Avoiding the inductor
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Design: 5th-order Butterworth LPF, = 10,000 rad/s
Prototype from the table: , H, F, H, F, H, .
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 6.18 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 16.18 kΩ | |
| H (series) | 20 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 16.18 kΩ | |
| H (series) | 6.18 kΩ | ||
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 1 MΩ, = 32.36 kΩ, so = 1.032 MΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+----[R5]-+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND ----------------------------------------------
Answer: terminating capacitors 10 nF; series resistors 6.18 kΩ, 20 kΩ, 6.18 kΩ; two FDNRs, each a GIC with C = 10 nF and = 16.18 kΩ; = 1 MΩ, = 1.032 MΩ.
- 2078 Bhadra · 2+5 marks
What do you mean by Frequency Dependent Negative Resistor (FDNR)? Design the 4th order Butterworth low pass filter with ωp = 20,000 rad/sec using FDNR. In your final circuit all the elements should be practically realizable. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It is realised with a GIC containing two capacitors.
It is used with the Bruton transformation (divide all impedances by ): inductors become resistors and grounded capacitors become grounded FDNRs, so the ladder has no inductors.
Design: 4th-order Butterworth LPF, = 20,000 rad/s
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 3.827 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 9.24 kΩ | |
| H (series) | 9.24 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 3.827 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 13.07 kΩ, so = 113.1 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer: terminating capacitors 10 nF; series resistors 3.827 kΩ and 9.24 kΩ; FDNRs: = GIC (C = 10 nF, = 9.24 kΩ), = GIC (C = 10 nF, = 3.827 kΩ); = 100 kΩ, = 113.1 kΩ.
- 2076 Asoj · 2+2+4 marks
What is Frequency Dependent Negative Resistor (FDNR)? How can it avoid the use of inductors? Explain. Design a lowpass filter having ω0 of 10⁴ rad/s using FDNR from the filter circuit given below. In your final design, all the elements should be practically realizable. [Figure: 1 Ω source resistor, shunt 1 F capacitor, series 2 H inductor, shunt 1 F capacitor, 1 Ω load]
Answer
FDNR
A frequency dependent negative resistor (FDNR) is a one-port with impedance . At , : a real, negative resistance whose size falls as . (unit F²Ω) is its constant. It is realised with a GIC containing two capacitors.
How it avoids inductors
Under the Bruton transformation every impedance is divided by : , , FDNR . The voltage ratio is unchanged, the inductor becomes a resistor, and the grounded capacitors become grounded FDNRs, each made with one GIC (capacitors at positions 1 and 5, ).
Design: = 10⁴ rad/s
Given ladder (3rd-order Butterworth, π form): , shunt F, series H, shunt F, .
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 10 kΩ | |
| H (series) | 20 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 10 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 1 MΩ, = 20 kΩ, so = 1.02 MΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]-+----[R2]-+-------+----o Vo
| | |
[D1] [D3] [CL||Rb]
GND --------------------------------------
Answer: terminating capacitors 10 nF; series resistor 20 kΩ; two FDNRs, each a GIC with C = 10 nF and = 10 kΩ; = 1 MΩ, = 1.02 MΩ.
- 2075 Chaitra · 6 marks
Design a fourth order Butterworth low pass filter having half power frequency of 4000 rad/s using Leapfrog simulation. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 0.7654 F | |
| A2 | integrator | , | 1.848 F | |
| A3 | inverter | R / R | ||
| A4 | integrator | , | 1.848 F | |
| A5 | lossy integrator | 0.7654 F | ||
| A6 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 19.13 nF |
| A2 | input(s) 10 kΩ | 46.2 nF |
| A4 | input(s) 10 kΩ | 46.2 nF |
| A5 | input(s) 10 kΩ, feedback 10 kΩ across C | 19.13 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: four integrators and two inverters, all resistors 10 kΩ; integrator capacitors 19.13 nF, 46.2 nF, 46.2 nF, 19.13 nF; half-power frequency 4000 rad/s.
- 2074 Chaitra · 7 marks
Design the fourth order Butterworth low pass filter using leapfrog simulation. In your final design the half power frequency should be 10000 rad/s and practically realizable elements. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 0.7654 F | |
| A2 | integrator | , | 1.848 F | |
| A3 | inverter | R / R | ||
| A4 | integrator | , | 1.848 F | |
| A5 | lossy integrator | 0.7654 F | ||
| A6 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 7.654 nF |
| A2 | input(s) 10 kΩ | 18.48 nF |
| A4 | input(s) 10 kΩ | 18.48 nF |
| A5 | input(s) 10 kΩ, feedback 10 kΩ across C | 7.654 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: four integrators and two inverters, all resistors 10 kΩ; integrator capacitors 7.654 nF, 18.48 nF, 18.48 nF, 7.654 nF; half-power frequency 10,000 rad/s.
- 2073 Shrawan · 8 marks
The following circuit is a third-order Chebyshev lowpass filter. Simulate it using the leap-frog method. The final design should have ω0 = 4000 rad/s and practically realizable element values. [Figure: source V1, 1 Ω source resistor, series 2.026 H, shunt 0.9941 F, series 2.026 H, 1 Ω load]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
Given ladder (3rd-order Chebyshev, normalised so the passband edge is 1 rad/s): , series H, shunt F, series H, .
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 2.026 F | |
| A2 | integrator | , | 0.9941 F | |
| A3 | inverter | R / R | ||
| A4 | lossy integrator | 2.026 F | ||
| A5 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 50.65 nF |
| A2 | input(s) 10 kΩ | 24.85 nF |
| A4 | input(s) 10 kΩ, feedback 10 kΩ across C | 50.65 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: three integrators and two inverters, all resistors 10 kΩ; integrator capacitors 50.65 nF, 24.85 nF, 50.65 nF; passband edge 4000 rad/s.
- 2072 Kartik · 6 marks
Design third order Butterworth low pass filter using Leapfrog simulation. Your final design should have half power frequency of 4KHz and practically realizable elements. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
From the table (n = 3): , series H, shunt F, series H, .
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 1 F | |
| A2 | integrator | , | 2 F | |
| A3 | inverter | R / R | ||
| A4 | lossy integrator | 1 F | ||
| A5 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 3.979 nF |
| A2 | input(s) 10 kΩ | 7.958 nF |
| A4 | input(s) 10 kΩ, feedback 10 kΩ across C | 3.979 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: three integrators and two inverters, all resistors 10 kΩ; integrator capacitors 3.979 nF, 7.958 nF, 3.979 nF; half-power frequency 4 kHz.
- 2071 Chaitra · 6 marks
Using leapfrog method simulate the LC ladder circuit given below to obtain a low pass filter having passband of 6KHz and suitable element values. [Figure: source V1, 1 Ω source resistor, shunt 2.0237 F, series 0.9941 H, shunt 2.0237 F, 1 Ω load (output V2)]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
Given ladder (π form, a 1 dB-ripple Chebyshev prototype with passband edge 1 rad/s): , shunt F, series H, shunt F, . Here the state variables are the capacitor voltages , and the inductor current (the source is converted to a current ).
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 2.0237 F | |
| A2 | integrator | , | 0.9941 F | |
| A3 | inverter | R / R | ||
| A4 | lossy integrator | 2.0237 F | ||
| A5 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 5.368 nF |
| A2 | input(s) 10 kΩ | 2.637 nF |
| A4 | input(s) 10 kΩ, feedback 10 kΩ across C | 5.368 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
Answer: three integrators and two inverters, all resistors 10 kΩ; integrator capacitors 5.368 nF, 2.637 nF, 5.368 nF; passband edge 6 kHz.
- 2070 Chaitra · 6 marks
Simulate third order Butterworth low pass filter using Leapfrog simulation. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Answer
Leapfrog (operational) simulation realises the doubly terminated LC ladder by simulating its equations rather than its elements: each reactive element is replaced by an op-amp integrator, and the integrators are coupled exactly as the ladder voltages and currents are coupled. The result keeps the low sensitivity of the passive ladder.
From the table (n = 3): , series H, shunt F, series H, .
Vin Rs=1 L1=1H L3=1H
o---[ R ]--(LLL)--+--(LLL)--+----o Vo
| |
C2=2F [RL=1]
| |
GND --------------+---------+
Write the state equations of the doubly terminated ladder (normalised, ). Every current is turned into a voltage by multiplying by a 1 Ω resistance, so each equation becomes an integrator:
The first and last equations are lossy integrators (the terminations give the "+1"); the middle ones are lossless integrators. Neighbouring integrators feed each other in alternate directions, which gives the "leapfrog" structure.
Using inverting op-amp integrators, (lossless) or (lossy, resistor across ), the signs are arranged as follows. Inverters supply the signals of opposite sign:
| Op-amp | Type | Inputs (each through ) | Output | Normalised (R = 1 Ω) |
|---|---|---|---|---|
| A1 | lossy integrator | , | 1 F | |
| A2 | integrator | , | 2 F | |
| A3 | inverter | R / R | ||
| A4 | lossy integrator | 1 F | ||
| A5 | inverter | R / R |
Check of one stage: A2 gives , which is the ladder equation for .
Denormalisation. Frequency scale by and choose all resistors = 10 kΩ (impedance scale ). Each capacitor becomes :
Final element values:
| Op-amp | Resistors | Capacitor |
|---|---|---|
| A1 | input(s) 10 kΩ, feedback 10 kΩ across C | 10 nF |
| A2 | input(s) 10 kΩ | 20 nF |
| A4 | input(s) 10 kΩ, feedback 10 kΩ across C | 10 nF |
| inverters | 10 kΩ in, 10 kΩ feedback | none |
Lossy integrator (A1, last stage)
+----[ R ]----+
+----| C |----+
Va--[R]--+| |
Vb--[R]--++----(-) |
(+) A ---+---- Vo
|
GND
Lossless integrator: same circuit without the
feedback resistor (only C from output to (-)).
The passband gain is 1/2 (−6 dB), the same as the doubly terminated prototype; the response is that of the passive ladder but with no inductors, and the low sensitivity of the ladder is kept.
The normalised simulation ( = 1 rad/s) has all resistors 1 Ω and capacitors 1 F, 2 F, 1 F.
Answer (example, = 10⁴ rad/s): all resistors 10 kΩ; integrator capacitors 10 nF, 20 nF, 10 nF.
- 2082 Bhadra · 8 marks
Design a 5th order Butterworth LPF using cascade of 1st order active section and MFB biquads with DC gain equal to unity and half power frequency at 1 kHz. Make the largest capacitance 0.1 μF.
Answer
Butterworth poles (n = 5) lie on the unit circle at 0°, ±36° and ±72° from the negative real axis, so
Each quadratic gives and . The filter is one first-order section followed by two MFB biquads; rad/s.
First-order section
An inverting lossy integrator: input , feedback :
Normalised: , F (pole at 1, gain 1). Scaling with = 0.1 μF: = 1.592 kΩ for both and .
+---[Rf]---+
+---| C |--+
Vi-[R1]--+--(-) |
A -----+--o
GND --(+)
MFB biquads
+----------[R2]-----------+
| |
| +----[C2]----+ |
| | | |
Vi o--[R1]---+--[R3]-+----(-) | |
| A ----+----+--o Vo
[C1] GND---(+)
|
GND
For this multiple-feedback (MFB) lowpass biquad:
Normalised design (, unity DC gain): take . Then and , so
Scaling: = 6283.2 rad/s. For each section choose so that its largest capacitor becomes 0.1 μF: . Then all three resistors are and . (Each section is driven by an op-amp output, so sections may be scaled separately.)
| Section | Q | |||||
|---|---|---|---|---|---|---|
| 1.618 | 4.8541 F | 0.2060 F | 7.726 kΩ | 100 nF | 4.244 nF | |
| 0.618 | 1.8541 F | 0.5393 F | 2.951 kΩ | 100 nF | 29.09 nF |
Final circuit
Vi -->[1st order]-->[MFB, Q=1.618]-->[MFB, Q=0.618]--> Vo
R=1.592k R=7.726k R=2.951k
C=0.1uF C1=0.1uF C1=0.1uF
C2=4.244nF C2=29.09nF
Each stage has DC gain −1, so the overall DC gain magnitude is 1 (sign −1; add a unity inverter if a positive output is needed). Half-power frequency 1 kHz.
Answer: first-order: R = 1.592 kΩ, C = 0.1 μF; MFB 1 (Q = 1.618): R = 7.726 kΩ, C1 = 0.1 μF, C2 = 4.244 nF; MFB 2 (Q = 0.618): R = 2.951 kΩ, C1 = 0.1 μF, C2 = 29.09 nF.
- 2081 Bhadra · 8 marks
Design a 4th order Butterworth LPF using cascade two MFB biquads with dc gain equal to unity and half power frequency at 1000rad/sec. Make the largest capacitance equal to 0.1 μF in your final circuit.
Answer
Butterworth poles (n = 4) lie at ±22.5° and ±67.5° from the negative real axis on the unit circle:
so the two biquads have and , with = 1000 rad/s.
MFB lowpass biquad
+----------[R2]-----------+
| |
| +----[C2]----+ |
| | | |
Vi o--[R1]---+--[R3]-+----(-) | |
| A ----+----+--o Vo
[C1] GND---(+)
|
GND
For this multiple-feedback (MFB) lowpass biquad:
Normalised design (, unity DC gain): take . Then and , so
Scaling
= 1000 rad/s. In each section set (the larger capacitor) to 0.1 μF: ; then and .
| Section | Q | |||||
|---|---|---|---|---|---|---|
| 0.5412 | 1.6236 F | 0.6159 F | 16.24 kΩ | 100 nF | 37.94 nF | |
| 1.3066 | 3.9197 F | 0.2551 F | 39.2 kΩ | 100 nF | 6.509 nF |
Check for section 2: rad/s.
Final circuit
Vi -->[MFB 1, Q=0.5412]-->[MFB 2, Q=1.3066]--> Vo
R = 16.24k R = 39.2k
C1 = 0.1uF C1 = 0.1uF
C2 = 37.94nF C2 = 6.509nF
Each section has DC gain −1, so the cascade has DC gain +1 (unity) and half-power frequency 1000 rad/s.
Answer: section 1: = 16.24 kΩ, = 0.1 μF, = 37.94 nF; section 2: = 39.2 kΩ, = 0.1 μF, = 6.509 nF.
- 2079 Bhadra · 7 marks
Design a 4th order Butterworth LPF using cascaded two Sallen-key biquad having half power frequency of 1 kHz and largest capacitor of 0.1 μF.
Answer
Butterworth n = 4 (pole table): and , so
Sallen–Key biquad
+--------[C1]---------+
| |
Vi o--[R1]------+--[R2]--+----(+) |
| A ---+---o Vo
[C2] +-(-) |
| | |
GND +------+
Unity-gain Sallen–Key lowpass biquad ( from the middle node to the output, to ground):
Normalised equal-resistor design (, ): and , so
Scaling
rad/s. In each section the larger capacitor is made 0.1 μF: , , .
| Section | Q | |||||
|---|---|---|---|---|---|---|
| 0.5412 | 1.0824 F | 0.9239 F | 1.723 kΩ | 100 nF | 85.36 nF | |
| 1.3066 | 2.6131 F | 0.3827 F | 4.159 kΩ | 100 nF | 14.64 nF |
Vi -->[SK 1, Q=0.5412]-->[SK 2, Q=1.3066]--> Vo
R1=R2=1.723k R1=R2=4.159k
C1=0.1uF C1=0.1uF
C2=85.36nF C2=14.64nF
Both sections are unity-gain followers, so the DC gain is 1 and no gain compensation is needed. Half-power frequency 1 kHz.
Answer: section 1: = 1.723 kΩ, = 0.1 μF, = 85.36 nF; section 2: = 4.159 kΩ, = 0.1 μF, = 14.64 nF.
- 2079 Baisakh · 8 marks
Design a 4th order Butterworth LPF using cascade of two Sallen-key biquads having half power frequency of 10 kHz, using 0.1 μF capacitors. Perform gain compensation if necessary.
Answer
Butterworth n = 4 (pole table): and , so
Equal-component Sallen–Key biquad
+--------[C]----------+
| |
Vi o--[R]-------+--[R]---+----(+) |
| A ---+---o Vo
[C] +--(-) |
| | |
GND +--[RB]--+
|
[RA]
|
GND
Equal-component Sallen–Key lowpass (, , amplifier gain ):
Element values
, = 0.1 μF (all four capacitors):
| Section | Q | |||
|---|---|---|---|---|
| 1 | 0.5412 | 1.1522 | 10 kΩ | 1.522 kΩ |
| 2 | 1.3066 | 2.2346 | 10 kΩ | 12.35 kΩ |
Overall passband gain = 2.5748 (8.21 dB).
Gain compensation
To bring the DC gain back to 1, replace the input resistor of each section by a divider (from ) and (to ground) that attenuates by while keeping the Thevenin resistance equal to :
(Check: and .)
| Section | ||
|---|---|---|
| 1 | 183.4 Ω | 1.205 kΩ |
| 2 | 355.7 Ω | 288.1 Ω |
Vi -->[SK 1: K=1.1522]-->[SK 2: K=2.2346]--> Vo
R=159.2, C=0.1uF R=159.2, C=0.1uF
RA=10k, RB=1.522k RA=10k, RB=12.35k
With the forced 0.1 μF capacitors at 10 kHz the resistors are small (159.2 Ω); a good op-amp with low output resistance is needed.
Answer: all C = 0.1 μF, R = 159.2 Ω; section 1: K = 1.1522 ( = 1.522 kΩ, = 10 kΩ); section 2: K = 2.2346 ( = 12.35 kΩ); uncompensated gain 2.5748; for unity gain use input dividers 183.4 Ω / 1.205 kΩ (section 1) and 355.7 Ω / 288.1 Ω (section 2).
- 2072 Chaitra · 8 marks
Design Sallen key lowpass filter for fourth order Butterworth filter. The final circuit should have ω0 = 10,000 rad/s and practically realizable elements. (Refer table 1 of Butterworth pole locations)
Answer
Butterworth n = 4 (pole table): and , so
Equal-component Sallen–Key biquad
+--------[C]----------+
| |
Vi o--[R]-------+--[R]---+----(+) |
| A ---+---o Vo
[C] +--(-) |
| | |
GND +--[RB]--+
|
[RA]
|
GND
Equal-component Sallen–Key lowpass (, , amplifier gain ):
Element values
, = 0.01 μF (chosen):
| Section | Q | |||
|---|---|---|---|---|
| 1 | 0.5412 | 1.1522 | 10 kΩ | 1.522 kΩ |
| 2 | 1.3066 | 2.2346 | 10 kΩ | 12.35 kΩ |
Overall passband gain = 2.5748 (8.21 dB).
Vi -->[SK 1: K=1.1522]-->[SK 2: K=2.2346]--> Vo
R=10k, C=0.01uF R=10k, C=0.01uF
RA=10k, RB=1.522k RA=10k, RB=12.35k
If unity DC gain is required, the input resistor of each section is split into a divider , : section 1: 11.52 kΩ and 75.69 kΩ; section 2: 22.35 kΩ and 18.1 kΩ.
Answer: all R = 10 kΩ and C = 0.01 μF; section 1 (Q = 0.5412): K = 1.1522, = 10 kΩ, = 1.522 kΩ; section 2 (Q = 1.3066): K = 2.2346, = 10 kΩ, = 12.35 kΩ; = 10,000 rad/s, passband gain 2.5748 (8.21 dB).
- 2070 Asar · 4 marks
What are the different techniques of designing higher order active filters? Discuss briefly.
Answer
Higher-order active filters (order > 2) are designed by one of these methods:
1. Cascade design
The transfer function is factored into second-order sections (plus one first-order section for odd order), each realised by a biquad (Sallen–Key, MFB, Tow–Thomas, KHN) and connected in cascade. Op-amp outputs have low impedance, so sections do not load each other.
- Simple to design and tune; each pole pair is set separately.
- Sensitivity is higher, especially for high-Q sections.
- Order of sections: usually low Q first, high Q last.
2. Direct (element) simulation of the LC ladder
Start from the doubly terminated LC ladder, which has the lowest sensitivity, and replace the inductors:
- Gyrator / GIC inductor simulation: grounded inductors (highpass ladders) by GICs, floating ones by two GICs or gyrators.
- FDNR (Bruton transformation): divide impedances by ; inductors become resistors and capacitors become grounded FDNRs (lowpass ladders).
3. Operational simulation (leapfrog)
The state equations of the ladder (currents and voltages of L and C) are realised with integrators and summers that feed each other alternately. It keeps the ladder's low sensitivity and suits lowpass and bandpass filters.
4. Multiple-loop feedback (MLF)
Integrator or biquad blocks with several feedback paths, e.g. follow-the-leader feedback (FLF) and primary-resonator block (PRB); the leapfrog is also a multiple-loop structure.
| Method | Sensitivity | Ease of design/tuning |
|---|---|---|
| Cascade | higher | easiest |
| Ladder simulation (GIC, FDNR) | low | moderate |
| Leapfrog / MLF | low | more complex |
Questions from Old Question Collection (BEI EX 606 and BEX EX 704) (Scanned IOE papers: BEI EX 606 2078–2083 and BEX EX 704 2069–2076), Old Question Collection (EX 704) (IOE BEX EX 704 papers from 2069 to 2081) and 2080 course paper (ENEX 301) (IOE ENEX 301 new-course paper, 2082 Chaitra). Answers are written for this site; check them against your class notes.
Chapter titles and hours from the IOE syllabus ↗