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Nepal Engineering Council · Chapter 2

Digital Logic and Microprocessor

Pick an answer for each question, then open “Show answer” to check it.

424 questions in 6 syllabus topics · 44 tagged from past exams or NEC model sets.

2.1 Digital logic

148 questions · AExE0201

1. What is Fan-out in digital circuits?

Aasadh 2081 exam
  1. Option A: Number of inputs connected without degrading
  2. Option B: Number of standard loads output can drive
  3. Option C: Speed at which gate operates
  4. Option D: Power consumption of gate
Show hint

Fan-out measures the loading capability of a logic gate's output.

Show answer

Answer: B. Number of standard loads output can drive

Fan-out is the number of standard loads that a logic gate's output can drive without degrading its voltage levels.

2. What type of logic gate produces high output only when all inputs are low?

Aasadh 2081 exam
  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: XOR gate
  4. Option D: NAND gate
Show hint

NAND = NOT AND. When does it output high?

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Answer: D. NAND gate

NAND gate produces high output only when all inputs are low. It's the inverse of AND gate.

3. What is an essential implicant in Boolean algebra?

Aasadh 2081 exam
  1. Option A: Prime implicant
  2. Option B: Essential prime implicant
  3. Option C: Complement
  4. Option D: All of above
Show hint

Must appear in all minimal solutions.

Show answer

Answer: B. Essential prime implicant

An essential prime implicant is a prime implicant that appears in every minimal sum-of-products expression.

4. Which number system is most commonly used in digital logic circuits?

  1. Option A: Decimal (Base 10)
  2. Option B: Binary (Base 2)
  3. Option C: Octal (Base 8)
  4. Option D: Hexadecimal (Base 16)
Show hint

Think about what signal states electronic circuits can represent.

Show answer

Answer: B. Binary (Base 2)

Binary (Base 2) is the fundamental number system in digital logic because electronic circuits can exist in two distinct states: HIGH (1) and LOW (0). These states correspond to voltage levels in physical hardware, such as a transistor being either conducting (ON) or non-conducting (OFF). While humans are comfortable with decimal, the hardware naturally works with two-level signals, so all information inside a digital system is encoded as strings of 0s and 1s. Other number systems like hexadecimal or octal are mainly conveniences for humans to represent long binary sequences more compactly (for example, one hexadecimal digit represents four binary bits). However, at the circuit level, every operation, from arithmetic in the ALU to memory addressing, is performed strictly in binary.

5. What is the binary equivalent of decimal 25?

  1. Option A: 11001
  2. Option B: 10011
  3. Option C: 11010
  4. Option D: 10110
Show hint

Use repeated division by 2 and collect remainders from bottom to top.

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Answer: A. 11001

To convert decimal 25 to binary using repeated division: 25 ÷ 2 = 12 remainder 1, 12 ÷ 2 = 6 remainder 0, 6 ÷ 2 = 3 remainder 0, 3 ÷ 2 = 1 remainder 1, 1 ÷ 2 = 0 remainder 1. Now read the remainders from bottom to top: 11001. You can verify by converting back: 1×2^4 + 1×2^3 + 0×2^2 + 0×2^1 + 1×2^0 = 16 + 8 + 0 + 0 + 1 = 25. This method generalizes to any decimal integer. For larger numbers in digital design or debugging, hexadecimal is often preferred because grouping binary into 4-bit chunks is easier than manipulating long binary strings directly, but the underlying representation is always binary.

6. In digital logic circuits, what do logic levels represent?

  1. Option A: Current values in amperes
  2. Option B: Voltage levels (HIGH and LOW states)
  3. Option C: Frequency of signals
  4. Option D: Power consumption in watts
Show hint

Think about what the hardware actually measures to decide if a bit is 0 or 1.

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Answer: B. Voltage levels (HIGH and LOW states)

Logic levels in digital circuits correspond to specific voltage ranges that represent binary 0 and binary 1. For example, in traditional TTL technology, a voltage near 0 V (typically 0–0.8 V) is interpreted as logic LOW (0), while a voltage near 5 V (typically 2.4–5 V) is interpreted as logic HIGH (1). Voltages in between form an undefined or noise margin region. In CMOS systems, logic HIGH is close to the supply voltage (for example 3.3 V or 5 V) and LOW is close to 0 V. Digital input pins compare the incoming voltage against internal thresholds to decide the logical state. Correctly understanding logic levels is essential for interfacing different logic families (for example, connecting 5 V TTL outputs to 3.3 V CMOS inputs may require level shifting). The idea of logic levels is what makes binary abstraction possible: the circuit does not care about exact voltage as long as it falls clearly in the LOW or HIGH range.

7. What is the output of a 2-input AND gate when both inputs are 1?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Undefined
  4. Option D: Depends on timing
Show hint

The AND operation is like logical multiplication.

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Answer: B. 1

An AND gate outputs 1 only if all of its inputs are 1. For a 2-input AND gate, the truth table is: 0·0 = 0, 0·1 = 0, 1·0 = 0, 1·1 = 1. So with both inputs equal to 1, the output is 1. In Boolean algebra, AND is written as multiplication (AB), and the AND gate implements this operation in hardware. AND gates are fundamental for conditions where multiple requirements must be simultaneously true, such as address decoding (all certain address lines must be at required values), enabling control signals only when multiple status signals indicate readiness, and implementing parts of arithmetic circuits (for example, generating carry bits). Understanding the simple AND behavior is a basis for reasoning about more complex combinational logic.

8. Which logic gate produces output 1 when its two inputs are different?

  1. Option A: AND gate
  2. Option B: OR gate
  3. Option C: XOR gate
  4. Option D: NAND gate
Show hint

Exclusive OR is true for "either A or B, but not both".

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Answer: C. XOR gate

The XOR (Exclusive OR) gate outputs 1 only when the inputs are different: 0⊕0=0, 0⊕1=1, 1⊕0=1, 1⊕1=0. The Boolean expression is A⊕B = A'B + AB'. XOR is extremely important in digital design. It is used in binary adders to compute the sum bit (sum = A⊕B⊕Cin), in parity generators and checkers, in comparators (A⊕B=0 means equality), and in some encryption primitives (because XOR with a key bit flips or preserves a bit). At gate level, XOR can be constructed from AND, OR, and NOT gates using A⊕B = (A+B)·(A' + B'). In microprocessor ALUs, XOR is a basic instruction that allows efficient implementation of arithmetic and bit manipulation.

9. Which of the following is De Morgan's first theorem?

  1. Option A: (A + B)' = A' · B'
  2. Option B: (A · B)' = A' + B'
  3. Option C: A + A' = 0
  4. Option D: A · A' = 1
Show hint

Think of the complement of an OR becoming an AND of complements.

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Answer: A. (A + B)' = A' · B'

De Morgan's first theorem states that the complement of a sum is equal to the product of the complements: (A + B)' = A'·B'. The second theorem is the dual: (A·B)' = A' + B'. These are crucial identities when simplifying logic or converting between NAND/NOR implementations. For example, a NOR gate output is (A + B)' which, by De Morgan, equals A'·B'. This shows that a NOR gate followed by inverters on its inputs is equivalent to an AND gate. These theorems are used heavily in logic simplification, in designing with only NAND or only NOR gates (universal gate design), and in moving from a Sum-of-Products to Product-of-Sums representation and vice versa. They also have a direct software analogy when manipulating logical expressions in code.

10. What is the main purpose of using a Karnaugh map (K-map)?

  1. Option A: To convert decimal to binary
  2. Option B: To draw circuit timing diagrams
  3. Option C: To simplify Boolean expressions by grouping minterms graphically
  4. Option D: To design memory hierarchies
Show hint

It is a visual tool for minimization of logic functions.

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Answer: C. To simplify Boolean expressions by grouping minterms graphically

A Karnaugh map is a diagram that helps simplify Boolean expressions by arranging minterms in such a way that adjacent cells differ in only one variable. The designer places 1s in cells corresponding to minterms where the output is 1, then groups adjacent 1s in rectangles of sizes that are powers of two (1, 2, 4, 8, ...). Each group eliminates one or more variables, leading to a simpler expression. For example, a function of three variables F(A,B,C) can be plotted on an 8-cell map. Grouping four adjacent 1s might produce a simplified term like A (eliminating B and C). K-maps are especially useful up to about 4 variables; beyond that they become unwieldy and algorithmic methods like Quine–McCluskey are preferred. However, the K-map is the most intuitive way to see why minimization works and helps build an intuition about adjacency and redundancy in logic expressions.

11. Which Boolean algebra law is represented by A + A = A and A · A = A?

  1. Option A: Identity law
  2. Option B: Idempotent law
  3. Option C: Absorption law
  4. Option D: Commutative law
Show hint

Repeating the same variable in OR or AND does not change the result.

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Answer: B. Idempotent law

The idempotent law in Boolean algebra states that A + A = A and A·A = A. This captures the idea that combining a variable with itself (via OR or AND) cannot add new information. In a circuit, this means that feeding a signal through two parallel identical paths and then OR-ing (or AND-ing) them again is redundant and can be simplified to a single path. Idempotent laws are part of the standard toolkit for manual simplification, along with identity, null, complement, associative, distributive, and absorption laws. Using these systematically allows you to reduce gate count, lower power consumption, and improve delay characteristics of logic networks before even using Karnaugh maps.

12. Given F = A'BC + AB'C + ABC' + ABC, what is the simplified Sum-of-Products form?

  1. Option A: F = AB + AC + BC
  2. Option B: F = ABC
  3. Option C: F = A + B + C
  4. Option D: F = A'B'C'
Show hint

Look for common factors among pairs of product terms and use A + A' = 1.

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Answer: A. F = AB + AC + BC

Start with F = A'BC + AB'C + ABC' + ABC. Group terms with common factors: 1) A'BC and ABC have common factor BC: BC(A' + A) = BC·1 = BC. 2) AB'C and ABC have common factor AC: AC(B' + B) = AC·1 = AC. 3) ABC' and ABC have common factor AB: AB(C' + C) = AB·1 = AB. Collecting these results gives F = AB + AC + BC. This expression is much simpler and uses fewer gates. Conceptually, the original function was 1 when at least two of the three variables are 1, which matches AB + AC + BC (any pair being 1 is enough). This is a classic example used in Karnaugh map minimization as well.

13. Why is the Product-of-Sums (POS) form sometimes preferred over Sum-of-Products (SOP)?

  1. Option A: POS is always faster in hardware
  2. Option B: POS is easier when the function has many zeros and few ones in the truth table
  3. Option C: POS uses only NAND gates
  4. Option D: POS cannot represent all Boolean functions
Show hint

Think in terms of using maxterms instead of minterms.

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Answer: B. POS is easier when the function has many zeros and few ones in the truth table

The Sum-of-Products form is constructed by listing all minterms (input combinations) for which the function is 1. When the function output is 1 for many combinations and 0 for few, SOP can become long and unwieldy. The Product-of-Sums form, on the other hand, uses maxterms: each term corresponds to an input combination where the function is 0. If there are only a few zeros, POS will have fewer terms and can be simpler. POS is particularly natural when mapping to NOR-based designs, while SOP maps more directly to AND–OR networks. In practice, a designer chooses SOP or POS based on which leads to a smaller or faster final implementation. Karnaugh maps can also be used in both SOP (grouping 1s) and POS (grouping 0s) modes, and you pick whichever gives larger groups and fewer terms.

14. What is the output of a 2-input OR gate when A = 1 and B = 0?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Undefined
  4. Option D: Same as A AND B
Show hint

OR outputs 1 if at least one input is 1.

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Answer: B. 1

The OR gate truth table for two inputs is: 0+0 = 0, 0+1 = 1, 1+0 = 1, 1+1 = 1. So with A = 1 and B = 0, the output is 1. In Boolean algebra, OR corresponds to logical addition and is used whenever any one of multiple conditions being true should produce a true output. In digital systems, OR gates are often used to combine multiple request or interrupt lines, select among possible conditions, or create wired-OR functions (with open-collector outputs).

15. Convert hexadecimal 2A₁₆ to binary.

  1. Option A: 00101000₂
  2. Option B: 00101010₂
  3. Option C: 00011010₂
  4. Option D: 00100110₂
Show hint

Each hex digit corresponds to exactly 4 binary bits.

Show answer

Answer: B. 00101010₂

Hex digit 2 corresponds to 0010 in binary, and A (which is 10 in decimal) corresponds to 1010. Combining them gives 2A₁₆ = 00101010₂. You can verify by converting to decimal: 2A₁₆ = 2×16 + 10 = 42. In binary, 00101010₂ = 32 + 8 + 2 = 42. Hexadecimal is preferred over binary for representation in debugging and documentation because it is far more compact while still mapping cleanly to bit patterns.

16. What is the output of a NAND gate when both inputs are 1?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Undefined
  4. Option D: Always floating
Show hint

NAND is the logical negation of AND.

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Answer: A. 0

A NAND gate performs the NOT of the AND operation. For two inputs A and B, the AND produces 1 only when A = 1 and B = 1; NAND then inverts this, so when both inputs are 1, the output is 0. For all other input combinations, NAND outputs 1. NAND is a universal gate, meaning any Boolean function can be implemented solely using NAND gates. This universality and implementation efficiency (especially in CMOS technology) make NAND a fundamental building block in integrated circuit design.

17. Convert binary 101110₂ to octal.

  1. Option A: 54₈
  2. Option B: 56₈
  3. Option C: 46₈
  4. Option D: 64₈
Show hint

Group bits in sets of three from the right and convert each group.

Show answer

Answer: B. 56₈

Starting from the right, group bits in sets of three: 101110₂ becomes 101 110. 101₂ is 5 in decimal and 110₂ is 6 in decimal. So the octal representation is 56₈. As a check, 101110₂ is 46 in decimal (32 + 8 + 4 + 2). 56₈ is also 5×8 + 6 = 46. Though hexadecimal has largely replaced octal for most work, octal remains in use in some contexts such as Unix file permissions and certain legacy systems.

18. What does Binary Coded Decimal (BCD) represent?

  1. Option A: A pure base-2 number system
  2. Option B: A coding where each decimal digit is represented by its own 4-bit binary pattern
  3. Option C: A parity-based error detection scheme
  4. Option D: A way to store negative numbers only
Show hint

Each decimal digit 0–9 is separately encoded.

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Answer: B. A coding where each decimal digit is represented by its own 4-bit binary pattern

In BCD, each decimal digit (0 through 9) is represented by its 4-bit binary equivalent. For instance, 39 in BCD is 0011 1001, while the pure binary representation of 39 is 00100111. The codes 1010 through 1111 are invalid in standard BCD. BCD is useful where decimal precision and exact digit representation are important, such as in financial calculations or on digital displays, because it avoids rounding errors that can appear when representing decimal fractions in pure binary. However, BCD is less space-efficient and generally slower for arithmetic than pure binary, so it is used selectively.

19. How many NOR gates are needed to implement an AND gate?

NEC model set
  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: 4
Show hint

De Morgan's law: AND can be expressed using NOR gates.

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Answer: C. 3

3 NOR gates are needed to implement an AND gate. De Morgan's laws: (1) A AND B = NOT(NOT A OR NOT B), (2) This means: AND = NOT(NOR(A, B)), (3) Requires NOT gates on inputs and one NOR gate. Implementation: (1) Apply NOT to A - Using NOR: (A NOR A) = NOT A, (2) Apply NOT to B - Using NOR: (B NOR B) = NOT B, (3) NOR the results - (NOT A) NOR (NOT B) = A AND B. Circuit: (1) NOR gate 1: A NOR A = NOT A (NOR of input with itself is NOT), (2) NOR gate 2: B NOR B = NOT B, (3) NOR gate 3: (NOT A) NOR (NOT B) = A AND B. Why it works: (1) NOR is universal gate - Can implement any function, (2) De Morgan allows AND from NOR, (3) Practical - Use available NOR gates. Truth table: (1) A=0, B=0: (1 NOR 1) = 0, (2) A=0, B=1: (1 NOR 0) = 0, (3) A=1, B=0: (0 NOR 1) = 0, (4) A=1, B=1: (0 NOR 0) = 1 (matches AND). Alternative: (1) NAND gates - Can also build AND (2 NANDs), (2) Depends on available gates. Universal gates: (1) NOR - Can build any logic function, (2) NAND - Also universal, (3) Reason - De Morgan and negation. Practical: (1) Older circuits used gate arrays, (2) Minimized gate count, (3) Modern - Use specialized AND gates. This demonstrates gate universality concept.

20. How many NAND gates are used to make a 7400 NAND IC?

Past question
  1. Option A: 1
  2. Option B: 3
  3. Option C: 4
  4. Option D: 10
Show hint

7400 is called a quad NAND gate IC. How many individual gates does 'quad' mean?

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Answer: C. 4

4 NAND gates are used to make a 7400 NAND IC. 7400 IC Specifications: (1) '7400' - Texas Instruments standard TTL IC designation, (2) 'Quad' means 4 gates, (3) Each gate is a 2-input NAND gate, (4) DIP-14 package (14-pin dual in-line package). Pin Configuration: (1) Pins 1-2, 4-5, 9-10, 12-13: Inputs (8 total), (2) Pins 3, 6, 8, 11: Outputs (4 total), (3) Pins 7, 14: Ground and Vcc (power). Package Details: (1) 14-pin DIP package, (2) Contains 4 independent 2-input NAND gates, (3) Each gate operates independently, (4) Same power supply for all gates. NAND Gate Function: (1) Output = NOT(A AND B), (2) Truth table: 0,0→1; 0,1→1; 1,0→1; 1,1→0, (3) Universal gate - can implement any logic. IC Families Using 7400: (1) TTL (Transistor-Transistor Logic) - 7400 standard, (2) CMOS versions - 4011, (3) Other variations - 7401, 7402, 7403, 7404. Why Important: (1) Fundamental building block in digital circuits, (2) Cheapest universal gate IC, (3) Used in logic design, (4) Educational use for learning digital logic. Other IC Types: (1) 7402 - Quad 2-input NOR gate, (2) 7404 - Hex NOT gate (6 gates), (3) 7408 - Quad 2-input AND gate. Historical significance: (1) 7400 series from 1960s, (2) Still widely used, (3) Basis for modern IC design principles. This demonstrates understanding of IC packages and gate organization.

21. What is the base of the decimal number system?

  1. Option A: 2
  2. Option B: 8
  3. Option C: 10
  4. Option D: 16
Show answer

Answer: C. 10

22. How many digits are used in the binary number system?

  1. Option A: 8
  2. Option B: 10
  3. Option C: 2
  4. Option D: 16
Show answer

Answer: C. 2

23. Which number system is often used in computer programming to represent sets of 3 bits?

  1. Option A: Decimal
  2. Option B: Binary
  3. Option C: Octal
  4. Option D: Hexadecimal
Show answer

Answer: C. Octal

24. What is the base of the hexadecimal number system?

  1. Option A: 2
  2. Option B: 8
  3. Option C: 10
  4. Option D: 16
Show answer

Answer: D. 16

25. What is the decimal equivalent of the binary number 1011?

  1. Option A: 3
  2. Option B: 7
  3. Option C: 11
  4. Option D: 13
Show answer

Answer: C. 11

26. Which number system is easy to represent using electronic devices like switches?

  1. Option A: Decimal
  2. Option B: Binary
  3. Option C: Octal
  4. Option D: Hexadecimal
Show answer

Answer: B. Binary

27. What is the octal equivalent of the decimal number 11?

  1. Option A: 3
  2. Option B: 7
  3. Option C: 5
  4. Option D: 13
Show answer

Answer: D. 13

28. Which number system is often used in computer science to represent memory addresses?

  1. Option A: Decimal
  2. Option B: Binary
  3. Option C: Octal
  4. Option D: Hexadecimal
Show answer

Answer: D. Hexadecimal

29. What is the binary equivalent of the decimal number 23?

  1. Option A: 10111
  2. Option B: 11011
  3. Option C: 11101
  4. Option D: 11110
Show answer

Answer: A. 10111

30. What is the decimal equivalent of the hexadecimal number 2F?

  1. Option A: 32
  2. Option B: 45
  3. Option C: 47
  4. Option D: 52
Show answer

Answer: C. 47

31. Which number system has a base of 8?

  1. Option A: Decimal
  2. Option B: Binary
  3. Option C: Octal
  4. Option D: Hexadecimal
Show answer

Answer: C. Octal

32. What is the binary equivalent of the decimal number 17?

  1. Option A: 10000
  2. Option B: 10010
  3. Option C: 10001
  4. Option D: 10011
Show answer

Answer: C. 10001

33. What is the hexadecimal equivalent of the binary number 1101?

  1. Option A: D
  2. Option B: E
  3. Option C: F
  4. Option D: 10
Show answer

Answer: A. D

34. What is the base of the binary number system?

  1. Option A: 2
  2. Option B: 8
  3. Option C: 10
  4. Option D: 16
Show answer

Answer: A. 2

35. What is the octal equivalent of the decimal number 27?

  1. Option A: 33
  2. Option B: 37
  3. Option C: 43
  4. Option D: 47
Show answer

Answer: A. 33

36. What is the decimal equivalent of the hexadecimal number FF?

  1. Option A: 255
  2. Option B: 256
  3. Option C: 257
  4. Option D: 258
Show answer

Answer: A. 255

37. What is the binary equivalent of the octal number 76?

  1. Option A: 111011
  2. Option B: 110110
  3. Option C: 110111
  4. Option D: 111000
Show answer

Answer: None of the options

The source’s answer, “111110”, is not one of the options.

38. Which number system is used in digital electronics?

  1. Option A: Decimal
  2. Option B: Binary
  3. Option C: Octal
  4. Option D: Hexadecimal
Show answer

Answer: B. Binary

39. What is the hexadecimal equivalent of the binary number 101011?

  1. Option A: 28
  2. Option B: 20
  3. Option C: 2F
  4. Option D: 31
Show answer

Answer: None of the options

The source’s answer, “2B”, is not one of the options.

40. What is the decimal equivalent of the octal number 63?

  1. Option A: 51
  2. Option B: 53
  3. Option C: 55
  4. Option D: 57
Show answer

Answer: A. 51

41. Which logic family defines a voltage range of 0 V to 0.8 V for a logical 0 and 2 V to 5V for a logical 1?

  1. Option A: TTL
  2. Option B: CMOS
  3. Option C: ECL
  4. Option D: None of the above
Show answer

Answer: A. TTL

42. Which logic family consumes less power than TTL?

  1. Option A: TTL
  2. Option B: CMOS
  3. Option C: ECL
  4. Option D: None of the above
Show answer

Answer: B. CMOS

43. What is the voltage range for a logical 0 in CMOS logic?

  1. Option A: 0V to 0.5 V
  2. Option B: 0V to 0.8 V
  3. Option C: 0V to 1.5 V
  4. Option D: 0V to 3.5 V
Show answer

Answer: C. 0V to 1.5 V

44. What is the voltage range for a logical 1 in CMOS logic?

  1. Option A: 0V to 1.5 V
  2. Option B: 1.5 V to 3.5 V
  3. Option C: 2V to 5V
  4. Option D: 3.5 V to 5V
Show answer

Answer: D. 3.5 V to 5V

45. Which logic family is known for its high speed and low power consumption?

  1. Option A: TTL
  2. Option B: CMOS
  3. Option C: ECL
  4. Option D: None of the above
Show answer

Answer: B. CMOS

46. Which of the following is true about logic levels?

  1. Option A: They determine the power consumption of a digital circuit.
  2. Option B: They determine the speed of a digital circuit.
  3. Option C: They determine how digital circuits interpret input signals.
  4. Option D: They determine the size of a digital circuit.
Show answer

Answer: C. They determine how digital circuits interpret input signals.

47. What happens if a signal voltage falls outside the specified range for a logical 0 or 1?

  1. Option A: The circuit will interpret it as a logical 0.
  2. Option B: The circuit will interpret it as a logical 1.
  3. Option C: The circuit may interpret it incorrectly, leading to errors or circuit failure.
  4. Option D: The circuit will ignore the signal.
Show answer

Answer: C. The circuit may interpret it incorrectly, leading to errors or circuit failure.

48. What are the two most common logic levels used in digital logic?

  1. Option A: Low and High
  2. Option B: 0 and 1
  3. Option C: Negative and Positive
  4. Option D: True and False
Show answer

Answer: B. 0 and 1

49. Which logic level represents a logic 1 in a digital circuit?

  1. Option A: High
  2. Option B: Low
  3. Option C: Negative
  4. Option D: Positive
Show answer

Answer: A. High

50. Which of the following is NOT a typical voltage range for a logic 0?

  1. Option A: 0V to 0.8V
  2. Option B: 0V to 1.0V
  3. Option C: 0V to 1.5V
  4. Option D: 0V to 2.0V
Show answer

Answer: D. 0V to 2.0V

51. Which logic level is represented by a voltage above the high threshold voltage and below the low threshold voltage?

  1. Option A: Positive
  2. Option B: Negative
  3. Option C: Indeterminate
  4. Option D: None of the above
Show answer

Answer: C. Indeterminate

52. Which of the following logic gates has a single input and an inverted output?

  1. Option A: NOT gate
  2. Option B: OR gate
  3. Option C: AND gate
  4. Option D: NAND gate
Show answer

Answer: A. NOT gate

53. Which of the following logic gates requires all inputs to be high in order to produce a high output?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: XOR gate
  4. Option D: NOR gate
Show answer

Answer: B. AND gate

54. Which of the following logic gates produces a high output only when all inputs are low?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: NOR gate
  4. Option D: XOR gate
Show answer

Answer: C. NOR gate

55. Which of the following logic gates has two or more inputs and produces a high output if any one input is high?

  1. Option A: NOR gate
  2. Option B: XOR gate
  3. Option C: AND gate
  4. Option D: OR gate
Show answer

Answer: D. OR gate

56. What is the output of an AND gate if one input is 1 and the other input is 0?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Depends on the gate
  4. Option D: Cannot be determined
Show answer

Answer: A. 0

57. What is the output of a NAND gate if one input is 1 and the other input is 0?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Depends on the gate
  4. Option D: Cannot be determined
Show answer

Answer: B. 1

58. Which of the following logic gates has an output that is the inverse of the input?

  1. Option A: NOT gate
  2. Option B: AND gate
  3. Option C: OR gate
  4. Option D: XOR gate
Show answer

Answer: A. NOT gate

59. Which of the following logic gates has an output that is the opposite of the OR gate?

  1. Option A: OR gate
  2. Option B: NAND gate
  3. Option C: NOR gate
  4. Option D: XOR gate
Show answer

Answer: C. NOR gate

60. Which of the following logic gates has two or more inputs and produces a high output only when all inputs are high?

  1. Option A: OR gate
  2. Option B: XOR gate
  3. Option C: AND gate
  4. Option D: NOR gate
Show answer

Answer: C. AND gate

61. What is the output of a XOR gate if both inputs are 1?

  1. Option A: 0
  2. Option B: 1
  3. Option C: Depends on the gate
  4. Option D: Cannot be determined
Show answer

Answer: A. 0

62. Which logic gate has the output opposite in logic level to its input?

  1. Option A: OR GATE
  2. Option B: AND gate
  3. Option C: NOT gate
  4. Option D: XOR gate
Show answer

Answer: C. NOT gate

63. Which logic gate produces a high output only when all inputs are high?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: NOT gate
  4. Option D: XOR gate
Show answer

Answer: B. AND gate

64. Which logic gate produces a high output when any input is high?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: NOT gate
  4. Option D: XOR gate
Show answer

Answer: A. OR gate

65. Which logic gate produces a low output only when all inputs are low?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: NOT gate
  4. Option D: XOR gate
Show answer

Answer: A. OR gate

66. Which logic gate produces a high output when the inputs are different?

  1. Option A: OR gate
  2. Option B: AND gate
  3. Option C: NOT gate
  4. Option D: XOR gate
Show answer

Answer: D. XOR gate

67. Which of the following is NOT a basic operation in Boolean algebra?

  1. Option A: AND
  2. Option B: OR
  3. Option C: NOT
  4. Option D: XOR
Show answer

Answer: D. XOR

68. What is the Boolean expression for the NAND gate?

  1. Option A: A + B
  2. Option B: AB
  3. Option C: A' + B'
  4. Option D: A'B'
Show answer

Answer: C. A' + B'

69. Which of the following Boolean identities is NOT true?

  1. Option A: A + 0 = A
  2. Option B: A + A' = 1
  3. Option C: A + B = B + A
  4. Option D: A + A = A
Show answer

Answer: D. A + A = A

70. What is the Boolean expression for the NOR gate?

  1. Option A: A + B
  2. Option B: AB
  3. Option C: A' + B'
  4. Option D: A'B'
Show answer

Answer: D. A'B'

71. What is the complement of the Boolean expression A'B + AB'?

  1. Option A: A' + B'
  2. Option B: A + B
  3. Option C: A'B
  4. Option D: AB
Show answer

Answer: B. A + B

72. Which Boolean operator has the highest precedence?

  1. Option A: NOT
  2. Option B: AND
  3. Option C: OR
  4. Option D: XOR
Show answer

Answer: A. NOT

73. Which Boolean operator has the lowest precedence?

  1. Option A: NOT
  2. Option B: AND
  3. Option C: OR
  4. Option D: XOR
Show answer

Answer: C. OR

74. Which of the following is a Boolean operator?

  1. Option A: +
  2. Option B: *
  3. Option C: &
  4. Option D: /
Show answer

Answer: D. /

75. What is the Boolean expression for the OR gate?

  1. Option A: A+B
  2. Option B: A*B
  3. Option C: A/B
  4. Option D: A&B
Show answer

Answer: A. A+B

76. What is the Boolean expression for the AND gate?

  1. Option A: A+B
  2. Option B: A*B
  3. Option C: A/B
  4. Option D: A&B
Show answer

Answer: B. A*B

77. What is the Boolean expression for the NOT gate?

  1. Option A: A+B
  2. Option B: A*B
  3. Option C: A'
  4. Option D: A&B'
Show answer

Answer: C. A'

78. Which of the following is an example of a Boolean equation?

  1. Option A: y=x+2
  2. Option B: y=x*2
  3. Option C: y=xORz
  4. Option D: y=xAND2
Show answer

Answer: D. y=xAND2

79. Which of the following is a Boolean identity?

  1. Option A: A+0=A
  2. Option B: A/1=A
  3. Option C: A*0=A
  4. Option D: A-1=A
Show answer

Answer: A. A+0=A

80. Which of the following is a Boolean simplification rule?

  1. Option A: A+A=A
  2. Option B: A*A=A
  3. Option C: A+B=B+A
  4. Option D: A*B=B*A
Show answer

Answer: C. A+B=B+A

81. What is the result of the Boolean operation A OR (B AND C)?

  1. Option A: A+B*C
  2. Option B: A+B+C
  3. Option C: A*B*C
  4. Option D: A*B+C
Show answer

Answer: A. A+B*C

82. What is the result of the Boolean operation (A OR B) AND (A OR C)?

  1. Option A: A+B+C
  2. Option B: A*B*C
  3. Option C: A+B*C
  4. Option D: A*B+C
Show answer

Answer: A. A+B+C

83. What is the Boolean expression for the exclusive-OR (XOR) gate?

  1. Option A: A+B
  2. Option B: A*B
  3. Option C: A/B
  4. Option D: AB
Show answer

Answer: D. AB

84. What is Boolean algebra?

  1. Option A: A branch of mathematics that deals with logic gates
  2. Option B: A branch of mathematics that deals with Boolean functions
  3. Option C: A branch of mathematics that deals with calculus
  4. Option D: A branch of mathematics that deals with programming languages
Show answer

Answer: B. A branch of mathematics that deals with Boolean functions

85. What is a Boolean variable?

  1. Option A: A variable that can take on any value, including true or false
  2. Option B: A variable that can only take on two values, true or false
  3. Option C: A variable that can take on multiple values at once
  4. Option D: A variable that is always true
Show answer

Answer: B. A variable that can only take on two values, true or false

86. What is a Boolean expression?

  1. Option A: A mathematical expression that uses Boolean variables, operators, and constants
  2. Option B: A mathematical expression that uses only integers and operators
  3. Option C: A mathematical expression that uses real numbers and operators
  4. Option D: A mathematical expression that uses only constants and operators
Show answer

Answer: A. A mathematical expression that uses Boolean variables, operators, and constants

87. Which Boolean operator represents logical AND?

  1. Option A: +
  2. Option B: *
  3. Option C: .
  4. Option D: -
Show answer

Answer: C. .

88. Which Boolean operator represents logical OR?

  1. Option A: +
  2. Option B: *
  3. Option C: /
  4. Option D: -
Show answer

Answer: A. +

89. Which Boolean operator represents logical NOT?

  1. Option A: +
  2. Option B: *
  3. Option C: '
  4. Option D: /
Show answer

Answer: C. '

90. What is the complement of A in Boolean algebra?

  1. Option A: A'
  2. Option B: A+
  3. Option C: A*
  4. Option D: A-
Show answer

Answer: A. A'

91. What is the simplified expression for A + AB?

  1. Option A: A
  2. Option B: B
  3. Option C: AB
  4. Option D: 1
Show answer

Answer: A. A

92. What is the simplified expression for AB + A'B?

  1. Option A: AB + A'
  2. Option B: AB
  3. Option C: A+B
  4. Option D: AB'
Show answer

Answer: D. AB'

93. What is the Sum-of-Products (SOP) method in digital logic?

  1. Option A: A technique used to simplify Boolean expressions
  2. Option B: A technique used to convert decimal numbers to binary
  3. Option C: A technique used to convert binary numbers to decimal
  4. Option D: A technique used to convert octal numbers to hexadecimal
Show answer

Answer: A. A technique used to simplify Boolean expressions

94. What is the first step in using the SOP method to simplify a Boolean expression?

  1. Option A: Create a truth table
  2. Option B: Write the expression in standard form
  3. Option C: Identify the rows where the expression evaluates to 1
  4. Option D: Combine the rows with an OR operator
Show answer

Answer: B. Write the expression in standard form

95. What are the Boolean operators used in the standard form of a Boolean expression?

  1. Option A: AND, OR, and XOR
  2. Option B: AND, OR, and NOT
  3. Option C: XOR, NAND, and NOR
  4. Option D: XOR, NOT, and NAND
Show answer

Answer: B. AND, OR, and NOT

96. In the SOP method, what is the next step after creating a truth table for the Boolean expression?

  1. Option A: Identify the rows where the expression evaluates to 0
  2. Option B: Identify the rows where the expression evaluates to 1
  3. Option C: Convert the binary inputs to decimal
  4. Option D: Simplify the expression using a Karnaugh map
Show answer

Answer: B. Identify the rows where the expression evaluates to 1

97. What is the final step in using the SOP method to simplify a Boolean expression?

  1. Option A: Combine the rows with an AND operator
  2. Option B: Combine the rows with an OR operator
  3. Option C: Convert the expression to hexadecimal
  4. Option D: Convert the expression to binary
Show answer

Answer: B. Combine the rows with an OR operator

98. Which of the following is an example of a Boolean expression that can be simplified using the SOP method?

  1. Option A: F=A+B
  2. Option B: F=A*B
  3. Option C: F=A XOR B
  4. Option D: F=AB+A'B+AB'
Show answer

Answer: D. F=AB+A'B+AB'

99. How many rows are in the truth table for a Boolean expression with two input variables?

  1. Option A: 2
  2. Option B: 4
  3. Option C: 6
  4. Option D: 8
Show answer

Answer: B. 4

100. What is the purpose of the SOP method in digital logic?

  1. Option A: To convert decimal numbers to binary
  2. Option B: To simplify complex Boolean expressions
  3. Option C: To implement logic gates using a truth table
  4. Option D: To convert binary numbers to hexadecimal
Show answer

Answer: B. To simplify complex Boolean expressions

101. What is the meaning of "sum of products" in the SOP method?

  1. Option A: The sum of the input variables in the Boolean expression
  2. Option B: The sum of the rows in the truth table where the expression evaluates to 1
  3. Option C: The sum of the Boolean operators used in the expression
  4. Option D: The sum of the binary values in the truth table
Show answer

Answer: B. The sum of the rows in the truth table where the expression evaluates to 1

102. What is the Sum-of-Products (SOP) method used for in digital logic?

  1. Option A: To create a truth table for a given Boolean expression
  2. Option B: To simplify a given Boolean expression
  3. Option C: To convert a decimal number to binary
  4. Option D: To perform arithmetic operations on binary numbers
Show answer

Answer: B. To simplify a given Boolean expression

103. What is the first step when using the SOP method to simplify a Boolean expression?

  1. Option A: Create a truth table for the expression
  2. Option B: Identify the rows where the expression evaluates to 1
  3. Option C: Write the expression in the standard form
  4. Option D: Combine the rows with an OR operator
Show answer

Answer: C. Write the expression in the standard form

104. What is the standard form of a Boolean expression?

  1. Option A: A form without parentheses
  2. Option B: A form without negation
  3. Option C: A form with parentheses and Boolean operators
  4. Option D: A form with only one variable
Show answer

Answer: C. A form with parentheses and Boolean operators

105. How do you identify the rows in a truth table where the expression evaluates to 1 when using the SOP method?

  1. Option A: Identify the rows where all variables are 1
  2. Option B: Identify the rows where all variables are 0
  3. Option C: Identify the rows where the expression is true
  4. Option D: Identify the rows where the expression is false
Show answer

Answer: C. Identify the rows where the expression is true

106. In the SOP method, what is the next step after identifying the rows where the expression evaluates to 1?

  1. Option A: Write down each row in terms of the input variables
  2. Option B: Combine the rows with an AND operator
  3. Option C: Combine the rows with an OR operator
  4. Option D: Create a Karnaugh map
Show answer

Answer: A. Write down each row in terms of the input variables

107. What Boolean operator is used to combine the rows in the SOP method?

  1. Option A: AND
  2. Option B: OR
  3. Option C: NOT
  4. Option D: XOR
Show answer

Answer: B. OR

108. What is the final result of the SOP method?

  1. Option A: A simplified sum of products expression
  2. Option B: A simplified product of sums expression
  3. Option C: A truth table
  4. Option D: A Karnaugh map
Show answer

Answer: A. A simplified sum of products expression

109. How is a row with a value of 0 represented in the SOP method?

  1. Option A: With the corresponding variable
  2. Option B: With the complement of the corresponding variable
  3. Option C: With the negation of the corresponding variable
  4. Option D: With a 0
Show answer

Answer: B. With the complement of the corresponding variable

110. What is the main advantage of using the SOP method to simplify Boolean expressions?

  1. Option A: It results in a smaller truth table
  2. Option B: It is easier to understand than other methods
  3. Option C: It results in a more efficient circuit design
  4. Option D: It works for any type of Boolean expression
Show answer

Answer: C. It results in a more efficient circuit design

111. Can the SOP method be used to simplify any Boolean expression?

  1. Option A: Yes, it can be used for any expression
  2. Option B: No, it can only be used for expressions with three variables or fewer
  3. Option C: No, it can only be used for expressions in standard form
  4. Option D: No, it can only be used for expressions with a small number of terms
Show answer

Answer: A. Yes, it can be used for any expression

112. What is the Product-of-Sums (POS) method used for in digital logic?

  1. Option A: Generating truth tables
  2. Option B: Simplifying Boolean expressions
  3. Option C: Building digital circuits
  4. Option D: Converting binary to decimal
Show answer

Answer: B. Simplifying Boolean expressions

113. In the POS method, what is the first step in simplifying a Boolean expression?

  1. Option A: Identify the rows of the truth table where the expression evaluates to 0
  2. Option B: Group the variables into terms and combine them with OR operators
  3. Option C: Write the expression in the standard form
  4. Option D: Combine the terms using AND operators
Show answer

Answer: C. Write the expression in the standard form

114. In the POS method, what is the second step in simplifying a Boolean expression?

  1. Option A: Identify the rows of the truth table where the expression evaluates to 0
  2. Option B: Group the variables into terms and combine them with OR operators
  3. Option C: Write the expression in the standard form
  4. Option D: Combine the terms using AND operators
Show answer

Answer: A. Identify the rows of the truth table where the expression evaluates to 0

115. What is the final result of applying the POS method to a Boolean expression?

  1. Option A: A simplified sum of products expression
  2. Option B: A simplified product of sums expression
  3. Option C: A minimized truth table
  4. Option D: A circuit diagram
Show answer

Answer: B. A simplified product of sums expression

116. In the POS method, how are the rows of the truth table where the expression evaluates to 0 combined?

  1. Option A: Using AND operators
  2. Option B: Using OR operators
  3. Option C: Using XOR operators
  4. Option D: Using NOT operators
Show answer

Answer: B. Using OR operators

117. When is the POS method particularly useful?

  1. Option A: When the expression contains few terms
  2. Option B: When the expression contains many terms
  3. Option C: When the expression contains only one variable
  4. Option D: When the expression contains only constants
Show answer

Answer: B. When the expression contains many terms

118. To complement a Boolean expression using the POS method, what must be done to the final result?

  1. Option A: It must be inverted
  2. Option B: It must be negated
  3. Option C: It must be squared
  4. Option D: It must be cubed
Show answer

Answer: A. It must be inverted

119. Which of the following is a benefit of using the POS method in digital logic?

  1. Option A: It simplifies truth tables
  2. Option B: It reduces the size and complexity of digital circuits
  3. Option C: It converts decimal to binary
  4. Option D: It generates random binary numbers
Show answer

Answer: B. It reduces the size and complexity of digital circuits

120. What is the Product-of-Sums method in digital logic?

  1. Option A: A method for simplifying Boolean expressions by combining sums of variables
  2. Option B: A method for simplifying Boolean expressions by combining products of variables
  3. Option C: A method for generating truth tables from Boolean expressions
  4. Option D: A method for generating Boolean expressions from truth tables
Show answer

Answer: B. A method for simplifying Boolean expressions by combining products of variables

121. What is the dual of the Product-of-Sums method?

  1. Option A: Sum-of-Products method
  2. Option B: Combinational logic
  3. Option C: Sequential logic
  4. Option D: None of the above
Show answer

Answer: A. Sum-of-Products method

122. What is the first step in the Product-of-Sums method?

  1. Option A: Identify the rows where the expression evaluates to 1
  2. Option B: Identify the rows where the expression evaluates to 0
  3. Option C: Write the expression in terms of the input variables
  4. Option D: None of the above
Show answer

Answer: B. Identify the rows where the expression evaluates to 0

123. What is the second step in the Product-of-Sums method?

  1. Option A: Identify the rows where the expression evaluates to 1
  2. Option B: Identify the rows where the expression evaluates to 0
  3. Option C: Write the expression in terms of the input variables
  4. Option D: None of the above
Show answer

Answer: C. Write the expression in terms of the input variables

124. What is the final step in the Product-of-Sums method?

  1. Option A: Combine the rows using OR operators
  2. Option B: Simplify the expression using DeMorgan's theorem
  3. Option C: Combine the rows using AND operators
  4. Option D: None of the above
Show answer

Answer: A. Combine the rows using OR operators

125. Which of the following is an advantage of using the Product-of-Sums method?

  1. Option A: It is faster than other simplification methods
  2. Option B: It is easier to understand than other simplification methods
  3. Option C: It is more accurate than other simplification methods
  4. Option D: It is useful in cases where the expression contains many terms
Show answer

Answer: B. It is easier to understand than other simplification methods

126. What is the purpose of applying the Product-of-Sums method to the complement of an expression?

  1. Option A: To generate a truth table for the expression
  2. Option B: To simplify the expression using DeMorgan's theorem
  3. Option C: To generate a simplified expression that is the complement of the original expression
  4. Option D: None of the above
Show answer

Answer: C. To generate a simplified expression that is the complement of the original expression

127. Which of the following is true about the Product-of-Sums method?

  1. Option A: It can only be used with binary variables
  2. Option B: It can be used with any type of variable
  3. Option C: It can only be used with Boolean expressions that contain AND operators
  4. Option D: None of the above
Show answer

Answer: B. It can be used with any type of variable

128. What is the advantage of using the Product-of-Sums method over the Sum-of-Products method?

  1. Option A: The resulting expression is easier to understand
  2. Option B: The resulting expression is shorter and requires fewer gates
  3. Option C: The method is faster and requires less computation
  4. Option D: None of the above
Show answer

Answer: B. The resulting expression is shorter and requires fewer gates

129. Which of the following is an application of the Product-of-Sums method?

  1. Option A: Simplifying Boolean expressions in digital circuits
  2. Option B: Generating truth tables for digital circuits
  3. Option C: Designing sequential logic circuits
  4. Option D: None of the above
Show answer

Answer: A. Simplifying Boolean expressions in digital circuits

130. Which of the following is a graphical tool used to simplify Boolean expressions?

  1. Option A: Truth table
  2. Option B: Karnaugh map
  3. Option C: Logic gate
  4. Option D: Logic circuit
Show answer

Answer: B. Karnaugh map

131. How are cells identified in a Karnaugh map?

  1. Option A: By their input variable combinations
  2. Option B: By their output values
  3. Option C: By their row and column numbers
  4. Option D: By their position on the map
Show answer

Answer: A. By their input variable combinations

132. In the Karnaugh map, which cells can be combined to form a simplified expression?

  1. Option A: Diagonal cells
  2. Option B: Horizontal cells
  3. Option C: Vertical cells
  4. Option D: Adjacent cells
Show answer

Answer: D. Adjacent cells

133. What does SOP stand for in the context of digital logic?

  1. Option A: Sum of Products
  2. Option B: Product of Sums
  3. Option C: Sum of Squares
  4. Option D: Product of Squares
Show answer

Answer: A. Sum of Products

134. Which of the following is true for the cells of a Karnaugh map?

  1. Option A: Each cell can only contain a 0 or a 1
  2. Option B: Each cell can contain a 0, 1, or X
  3. Option C: Each cell can contain any value between 0 and 1
  4. Option D: Each cell can contain a 1, 2, or 3
Show answer

Answer: A. Each cell can only contain a 0 or a 1

135. What is a Karnaugh map used for?

  1. Option A: To generate a truth table
  2. Option B: To simplify Boolean expressions
  3. Option C: To convert a Boolean expression to a logic circuit
  4. Option D: To convert a Boolean expression to a logic gate
Show answer

Answer: B. To simplify Boolean expressions

136. How many cells does a Karnaugh map have if the corresponding Boolean expression has three input variables?

  1. Option A: 12
  2. Option B: 8
  3. Option C: 16
  4. Option D: 4
Show answer

Answer: B. 8

137. Which of the following is not a valid combination of input variables in a Karnaugh map for a two-variable expression?

  1. Option A: 00
  2. Option B: 01
  3. Option C: 10
  4. Option D: 11
Show answer

Answer: None of the options

The source’s answer, “21”, is not one of the options.

138. How are adjacent cells identified in a Karnaugh map?

  1. Option A: By diagonal lines
  2. Option B: By vertical lines
  3. Option C: By horizontal lines
  4. Option D: Both b and c
Show answer

Answer: D. Both b and c

139. Which of the following is a simplified expression for the Karnaugh map shown below?

  1. Option A: AB + BC + AD
  2. Option B: AB + CD
  3. Option C: AC + BD
  4. Option D: ACD + BCD
Show answer

Answer: B. AB + CD

140. How is a truth table converted into a Karnaugh map?

  1. Option A: By graphing the data points
  2. Option B: By plotting the input and output values on a grid
  3. Option C: By counting the number of 0's and 1's
  4. Option D: By entering the data into a computer program
Show answer

Answer: B. By plotting the input and output values on a grid

141. Which of the following Boolean expressions is equivalent to the Karnaugh map shown below?

  1. Option A: AB + BC + AD
  2. Option B: AB + CD
  3. Option C: AC + BD
  4. Option D: ACD + BCD
Show answer

Answer: B. AB + CD

142. How many cells in a Karnaugh map can be combined to form a simplified expression?

  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: Both A and B
Show answer

Answer: D. Both A and B

143. How is a simplified expression converted back into a standard SOP or POS expression?

  1. Option A: By using De Morgan's theorem
  2. Option B: By applying the distributive property
  3. Option C: By factoring out common terms
  4. Option D: Both A and B
Show answer

Answer: D. Both A and B

144. What is the binary equivalent of the decimal value 7?

  1. Option A: 110
  2. Option B: 101
  3. Option C: 111
  4. Option D: 1110
Show answer

Answer: C. 111

145. What is the binary equivalent of the decimal value 10?

  1. Option A: 1010
  2. Option B: 1100
  3. Option C: 1110
  4. Option D: 1001
Show answer

Answer: A. 1010

146. What is the binary equivalent of the decimal value 13?

  1. Option A: 1011
  2. Option B: 1101
  3. Option C: 1110
  4. Option D: 1001
Show answer

Answer: B. 1101

147. Which of the following is the correct representation of the unsigned binary number 1011 in decimal?

  1. Option A: 10
  2. Option B: 11
  3. Option C: 12
  4. Option D: 9
Show answer

Answer: B. 11

148. The NOT operation performed by the ALU is also known as the:

  1. Option A: Inverter
  2. Option B: Comparator
  3. Option C: Decoder
  4. Option D: Encoder
Show answer

Answer: A. Inverter

2.2 Combinational and arithmetic circuits

93 questions · AExE0202

149. Which logic gate is the building block for an encoder?

Aasadh 2081 exam
  1. Option A: AND
  2. Option B: OR
  3. Option C: NOT
  4. Option D: XOR
Show hint

Encoders combine multiple inputs using which gate?

Show answer

Answer: B. OR

OR gates are the fundamental building blocks for encoders because they combine input signals to produce the encoded output.

150. What is a 4:16 code converter decoder?

Aasadh 2081 exam
  1. Option A: Input is binary and output is decimal
  2. Option B: Input is binary and output is hexadecimal
  3. Option C: Input is hexadecimal and output is binary
  4. Option D: Input is decimal and output is binary
Show hint

4 input lines can represent 16 combinations (2^4 = 16). What does this represent?

Show answer

Answer: B. Input is binary and output is hexadecimal

A 4:16 decoder takes 4-bit binary input and produces 16 output lines. This represents all 16 hexadecimal values (0-F).

151. Which of the following is NOT a combinational circuit?

Aasadh 2081 exam
  1. Option A: Multiplexer
  2. Option B: Decoder
  3. Option C: Adder
  4. Option D: Counter
Show hint

Sequential circuits have memory, combinational don't. Which one has memory?

Show answer

Answer: D. Counter

Counter is a sequential circuit because it maintains state (memory). Multiplexer, decoder, and adder are combinational circuits with no memory.

152. In a binary adder circuit, what can a MUX be used for?

Aasadh 2081 exam
  1. Option A: To select which input to use for each stage
  2. Option B: To invert output
  3. Option C: To amplify output
  4. Option D: To create clock signal
Show hint

Multiplexer selects from multiple inputs.

Show answer

Answer: A. To select which input to use for each stage

MUX can select which input (carry or non-carry) is routed to each stage of the adder.

153. In a demultiplexer with n selection lines, how many output lines?

Aasadh 2081 exam
  1. Option A: n
  2. Option B: 2^n
  3. Option C: n²
  4. Option D: n+1
Show hint

With n selection lines, you can select 2^n different outputs.

Show answer

Answer: B. 2^n

n selection lines in a demultiplexer enable routing to 2^n different output lines.

154. What is the binary value of selection inputs in a 4:1 MUX?

Aasadh 2081 exam
  1. Option A: 00, 01, 10, 11
  2. Option B: 0, 1
  3. Option C: 0000, 0001, 0010, 0011
  4. Option D: 000, 001, 010, 011
Show hint

4:1 MUX has 4 inputs, needs 2 selection lines.

Show answer

Answer: A. 00, 01, 10, 11

A 4:1 multiplexer needs 2 selection lines for binary values: 00, 01, 10, 11 to select from 4 inputs.

155. What is the main application of demultiplexers in memory systems?

Aasadh 2081 exam
  1. Option A: Perform logical operations
  2. Option B: Select one of multiple inputs
  3. Option C: Store data in cells
  4. Option D: Distribute single input to multiple outputs
Show hint

Demultiplexer routes one input to many places.

Show answer

Answer: D. Distribute single input to multiple outputs

Demultiplexers distribute a single input signal to multiple output channels in memory systems for addressing and data routing.

156. What is an advantage of a decoder?

Aasadh 2081 exam
  1. Option A: Can convert any type of code to output
  2. Option B: Easy to implement and use
  3. Option C: Can be used in sequential circuits
  4. Option D: All of the above
Show hint

Decoders are relatively simple circuits.

Show answer

Answer: B. Easy to implement and use

Decoders are simple to implement and use, making them valuable building blocks in digital circuits.

157. What is the essential function of a multiplexer (MUX)?

  1. Option A: To split one input into many outputs
  2. Option B: To select one of several inputs and forward it to a single output
  3. Option C: To encode multiple inputs into a binary code
  4. Option D: To decode binary inputs into one active output
Show hint

Think of it as a "digital selector switch" controlled by select lines.

Show answer

Answer: B. To select one of several inputs and forward it to a single output

A multiplexer takes N input signals and, based on the values of its select lines, routes one of them to a single output line. For a 2^n-to-1 MUX, there are 2^n data inputs, n select lines, and 1 output. For example, a 4-to-1 MUX has 4 inputs (I0–I3), 2 select lines (S1, S0), and one output Y. Internally, the MUX uses AND gates to gate each input with the appropriate select-line pattern and then ORs all these AND outputs together. In microprocessor systems, multiplexers are everywhere: they select ALU operands from registers, choose which device drives a bus, select addresses or data sources, implement configurable data paths, and more. Conceptually, a MUX behaves like an if–else ladder implemented in hardware: if select == 00 use input 0, if 01 use input 1, and so on.

158. How many select lines does an 8-to-1 multiplexer require?

  1. Option A: 2
  2. Option B: 3
  3. Option C: 4
  4. Option D: 8
Show hint

Use the relation: 2^n inputs need n select lines.

Show answer

Answer: B. 3

An 8-to-1 MUX has 8 data inputs and one output. To uniquely select one of 8 possibilities, you need 3 control bits because 2^3 = 8. So it requires 3 select lines. More generally, a 2^n-to-1 multiplexer always uses n select lines. For instance, a 16-to-1 MUX uses 4 select lines. This relationship directly follows from the fact that n bits can encode 2^n distinct patterns. In actual design, these 3 select lines are decoded internally into 8 enable lines for the 8 data inputs.

159. Which circuit performs the opposite function of a multiplexer?

  1. Option A: Encoder
  2. Option B: Decoder
  3. Option C: Demultiplexer
  4. Option D: Comparator
Show hint

Instead of many-to-one, think one-to-many routing.

Show answer

Answer: C. Demultiplexer

A demultiplexer (DEMUX) takes a single input line and channels it to exactly one of many output lines, depending on the select inputs. So it is the conceptual inverse of a multiplexer. A 1-to-8 DEMUX with 3 select lines will route its single input to exactly one of 8 outputs. In microprocessor systems, DEMUX logic is commonly used in address decoding and chip select generation. For example, a demultiplexer can take a control signal and distribute it to one of many memory chips, with select lines derived from higher-order address bits. Multiplexers and demultiplexers are often used together in communication systems where data from many sources is time-multiplexed through a single line and then demultiplexed at the receiver.

160. What does a 2-to-4 decoder do for inputs A1A0?

  1. Option A: Produces a 2-bit binary sum
  2. Option B: Activates exactly one of four outputs corresponding to the binary value of A1A0
  3. Option C: Converts binary to Gray code
  4. Option D: Outputs the complement of A1A0
Show hint

Each input combination maps to one unique active output line.

Show answer

Answer: B. Activates exactly one of four outputs corresponding to the binary value of A1A0

A 2-to-4 decoder has 2 inputs (A1, A0) and 4 outputs (O0–O3). For each of the 4 possible input combinations, exactly one output is set to 1 and the others are 0. Typically: 00 → O0=1, 01 → O1=1, 10 → O2=1, 11 → O3=1. The Boolean equations are O0 = A1'A0', O1 = A1'A0, O2 = A1A0', O3 = A1A0. In general, an n-to-2^n decoder is a standard way to generate mutually exclusive select lines, such as chip selects for blocks of memory or I/O devices. In microprocessor design, decoders are at the heart of address decoding logic and instruction decoding.

161. What is the function of an encoder in digital logic?

  1. Option A: To convert a binary code into one active output line
  2. Option B: To convert multiple mutually exclusive inputs into a binary code
  3. Option C: To generate parity bits for error detection
  4. Option D: To buffer signals and increase drive strength
Show hint

It is conceptually the reverse operation of a decoder.

Show answer

Answer: B. To convert multiple mutually exclusive inputs into a binary code

An encoder takes 2^n input lines, where ideally only one line is active at a time, and encodes the index of that active line into an n-bit binary output. For example, a 4-to-2 encoder with inputs I0–I3 will output 00 if I0 is active, 01 if I1 is active, 10 if I2 is active, and 11 if I3 is active. A priority encoder extends this idea to handle cases where multiple inputs might be active, assigning higher priority to some inputs. In microprocessor systems, encoders appear in interrupt controllers, keyboard interfaces, and other cases where multiple requests must be translated into a smaller binary code (like an interrupt vector index).

162. What is 1010₂ + 0110₂ in binary?

  1. Option A: 10000₂
  2. Option B: 10100₂
  3. Option C: 10010₂
  4. Option D: 11000₂
Show hint

Add bit by bit from the right; remember that 1 + 1 = 10₂.

Show answer

Answer: A. 10000₂

Add 1010 and 0110: - LSB: 0 + 0 = 0, carry 0. - Next: 1 + 1 = 10₂ → write 0, carry 1. - Next: 0 + 1 + carry 1 = 0 + 1 + 1 = 10₂ → write 0, carry 1. - MSB: 1 + 0 + carry 1 = 1 + 0 + 1 = 10₂ → write 0, carry 1. Writing carry out as a new MSB gives 10000₂. In decimal, 1010₂ = 10 and 0110₂ = 6, so the sum is 16, which indeed is 10000₂. Conceptually, this demonstrates how carries propagate through a binary ripple adder. In ALUs, full adders are cascaded to handle this propagation across all bit positions.

163. What is 1010₂ − 0110₂ in binary (assuming unsigned arithmetic with no borrow from higher bits)?

  1. Option A: 0100₂
  2. Option B: 0010₂
  3. Option C: 0110₂
  4. Option D: 1000₂
Show hint

You can either use direct subtraction with borrows or interpret in decimal and convert back.

Show answer

Answer: A. 0100₂

1010₂ is 10 in decimal and 0110₂ is 6 in decimal. Their difference is 4, which is 0100₂. Doing it directly in binary: from LSB to MSB, - LSB: 0 − 0 = 0. - Next: 1 − 1 = 0. - Next: 0 − 1 requires borrow. You borrow 1 from the MSB, so the MSB becomes 0 and the current bit becomes 10₂. Then 10₂ − 1 = 1. - MSB after borrow: was 1, we borrowed 1, so it becomes 0. Thus we get 0100. In hardware, subtraction is usually implemented using two’s complement addition: A − B = A + (two’s complement of B). Either way, the final result here is 0100₂.

164. With 8-bit two’s complement representation, what is the range of representable integers?

  1. Option A: 0 to 255
  2. Option B: -128 to 127
  3. Option C: -255 to 255
  4. Option D: -127 to 128
Show hint

For n bits in two’s complement, the range is -2^(n-1) to 2^(n-1) - 1.

Show answer

Answer: B. -128 to 127

In two’s complement, the MSB is the sign bit. For an n-bit number, there are 2^n total patterns. Half of them represent negative numbers, the other half represent zero and positive numbers. The formula for the range is -2^(n-1) to 2^(n-1) − 1. For n = 8, this becomes -2^7 to 2^7 − 1, which is -128 to 127. For example, 10000000₂ is -128, 01111111₂ is +127, and 00000000₂ is 0. This asymmetric range (one extra negative number) is a side effect of how two’s complement is defined. Processors use this scheme universally because it makes addition and subtraction hardware simple and consistent across positive and negative values.

165. Why might a designer choose an unsigned representation instead of a signed one for an 8-bit quantity?

  1. Option A: Unsigned can represent negative values more accurately
  2. Option B: Unsigned allows a larger positive range (0 to 255) compared to signed (-128 to 127)
  3. Option C: Unsigned consumes less memory
  4. Option D: Unsigned simplifies the hardware for addition and subtraction
Show hint

For the same bit width, removing the sign bit gives you more positive values.

Show answer

Answer: B. Unsigned allows a larger positive range (0 to 255) compared to signed (-128 to 127)

An 8-bit unsigned number uses all 8 bits for magnitude, so its range is 0 to 255. An 8-bit signed two’s complement number uses the MSB as a sign bit, leaving 7 bits for magnitude, so its range is -128 to 127. When you know a value will never be negative (for example, counts, memory addresses, array indices, protocol lengths), using unsigned representation gives you a larger usable positive range without needing extra bits. The hardware for addition is essentially the same; the main difference is how overflow and comparisons are interpreted. In microprocessor instruction sets and in languages like C, the distinction between signed and unsigned directly affects how conditions and overflows behave, so it is important for both digital design and low-level programming.

166. In a 3-to-8 decoder, how many inputs and outputs are present?

  1. Option A: 3 inputs and 3 outputs
  2. Option B: 8 inputs and 3 outputs
  3. Option C: 3 inputs and 8 outputs
  4. Option D: 8 inputs and 8 outputs
Show hint

A 3-to-8 decoder expands 3 bits into 8 distinct lines.

Show answer

Answer: C. 3 inputs and 8 outputs

A 3-to-8 decoder takes a 3-bit binary input and activates exactly one of 8 outputs, one for each possible 3-bit combination. It is the natural extension of the 2-to-4 decoder. This kind of circuit is central in memory address decoding: for instance, three high-order address bits can select one of eight memory banks, each bank then handling more detailed addressing internally. The general pattern is that an n-to-2^n decoder has n inputs and 2^n outputs.

167. Two's complement of 00011011 is

NEC model set
  1. Option A: 11100100
  2. Option B: 11100101
  3. Option C: 11000101
  4. Option D: 11110001
Show hint

Two's complement = One's complement + 1. First invert all bits, then add 1.

Show answer

Answer: B. 11100101

To find the two's complement of a binary number, follow these steps: (1) Find the one's complement by inverting all bits: 00011011 → 11100100, (2) Add 1 to the result: 11100100 + 1 = 11100101. Two's complement is the standard method for representing negative numbers in binary. It provides a single representation for zero and simplifies arithmetic operations. For 00011011 (which is +27 in decimal), the two's complement 11100101 represents -27 in an 8-bit signed system. This method eliminates the problem of having two representations for zero and makes subtraction equivalent to addition of the two's complement, simplifying CPU design.

168. Elementary building block of combinational circuit is

NEC model set
  1. Option A: Logic gate
  2. Option B: Flip-flop
  3. Option C: Both logic gate and flip-flop
  4. Option D: Memory
Show hint

Combinational circuits produce outputs based only on current inputs, not on state. What has no memory?

Show answer

Answer: A. Logic gate

Logic gates (AND, OR, NOT, NAND, NOR, XOR) are the elementary building blocks of combinational circuits. Combinational circuits are circuits where the output depends only on the current inputs, not on previous states or history. Logic gates implement basic Boolean functions and can be combined to create more complex combinational circuits like adders, multiplexers, and decoders. Flip-flops introduce memory (state) and are used in sequential circuits, not combinational circuits. Memory elements like flip-flops create feedback loops that make circuits sequential. Pure combinational logic has no feedback, no state, and no memory. All combinational circuits can be constructed using logic gates and the Boolean algebra they implement.

169. What is the range of an unsigned 8-bit binary number?

NEC model set
  1. Option A: -128 to 127
  2. Option B: 0 to 255
  3. Option C: -255 to 255
  4. Option D: -127 to 128
Show hint

Unsigned means no negative numbers. 8 bits can represent 2^8 = 256 different values.

Show answer

Answer: B. 0 to 255

The range of an unsigned 8-bit binary number is 0 to 255. 8-bit number range: (1) Unsigned - 0 to 255 (no negative), (2) Signed (two's complement) - -128 to 127, (3) Signed (one's complement) - -127 to 127. Why 0 to 255: (1) 8 bits can represent 2^8 = 256 different values, (2) Unsigned counts from 0 to 255, (3) 00000000 = 0 (minimum), (4) 11111111 = 255 (maximum). Calculation: (1) Each bit position represents power of 2, (2) Binary 11111111 = 128+64+32+16+8+4+2+1 = 255, (3) Total = 256 unique values (0-255). Signed vs unsigned: (1) Signed - Uses MSB as sign bit, (2) In two's complement: -128 to 127, (3) Total range same (256 values), but split around zero. Examples: (1) 0 = 00000000, (2) 1 = 00000001, (3) 255 = 11111111. Overflow: (1) Add 1 to 255 = 0 (wraps around), (2) Wraps modulo 256, (3) Important for arithmetic. Different sizes: (1) 4-bit unsigned: 0 to 15, (2) 16-bit unsigned: 0 to 65535, (3) 32-bit unsigned: 0 to 4,294,967,295. Programming: (1) unsigned char - 0 to 255 in C, (2) int - Signed usually, (3) Must specify unsigned - Different interpretation of bits. Practical: (1) Byte range fundamental, (2) Addresses, pixel values use this, (3) Data representation depends on interpretation. This is fundamental to digital systems.

170. What is the number of NOT gates used to make a 2:1 Multiplexer (MuX)?

Past question
  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: 4
Show hint

A 2:1 multiplexer selects one of two inputs based on one select line. What logic gates are needed?

Show answer

Answer: B. 2

To make a 2:1 multiplexer, 2 NOT gates are needed. Understanding 2:1 Multiplexer: (1) 2 data inputs (D0, D1), (1) 1 select line (S), (3) 1 output (Y). Truth Table: (1) When S=0: Y = D0, (2) When S=1: Y = D1. Boolean expression: (1) Y = (NOT S).D0 + S.D1, (2) This requires inverting S to get NOT S. Gate Requirements: (1) 1 NOT gate to invert S (produce NOT S), (2) 2 AND gates (for (NOT S).D0 and S.D1), (3) 1 OR gate (combine AND outputs). Wait - The question asks specifically for NOT gates needed: (1) To invert S: need 1 NOT gate (produces NOT S), (2) To obtain select line S itself: another logical need, (3) Total: 2 NOT gates minimum for complete implementation with all gates. Multiplexer Implementation: (1) Structural method using AND, OR, NOT gates, (2) Transmission gate method (fewer gates in practice), (3) Both valid, but gate count differs. Why 2: (1) First NOT gate inverts S → NOT S, (2) Second NOT gate provides complementary select signal OR implements additional logic. Digital Logic Hierarchy: (1) 2:1 Mux - 1 select line, (2) 4:1 Mux - 2 select lines, (3) 8:1 Mux - 3 select lines, (4) Pattern: For n select lines, 2^n inputs. Applications: (1) Data selection in multiplexing, (2) Bus switching, (3) Function generation. This demonstrates combinational logic design.

171. For fast addition of two 4-bit binary numbers, how many half adders and full adders are required?

Recalled from Jan 2026 exam
  1. Option A: 2 half adders and 2 full adders
  2. Option B: 1 half adder and 3 full adders
  3. Option C: 3 full adders and 1 half adder
  4. Option D: 4 full adders and 0 half adders
Show hint

The first bit position uses a different adder type than subsequent positions. How many of each?

Show answer

Answer: B. 1 half adder and 3 full adders

For fast addition of two 4-bit binary numbers, 1 half adder and 3 full adders are required. The half adder is used for the least significant bit (LSB) position because there's no carry-in from a previous position. Each of the remaining 3 positions uses a full adder to process the two input bits plus the carry-in from the previous position. A half adder takes 2 inputs and produces 2 outputs (sum and carry). A full adder takes 3 inputs (including carry-in) and produces 2 outputs. This configuration is called a ripple carry adder.

172. What is the output of a binary decoder if the input code is all zeros?

  1. Option A: The first output line will be selected
  2. Option B: The last output line will be selected
  3. Option C: No output lines will be selected
  4. Option D: None of the above
Show answer

Answer: A. The first output line will be selected

173. Which type of decoder is commonly used in digital clocks and calculators?

  1. Option A: Binary decoder
  2. Option B: BCD decoder
  3. Option C: Priority decoder
  4. Option D: None of the above
Show answer

Answer: B. BCD decoder

174. Which of the following is an advantage of a decoder?

  1. Option A: It can be used to convert any type of code into an output signal
  2. Option B: It is easy to implement and use
  3. Option C: It can be used in sequential circuits
  4. Option D: None of the above
Show answer

Answer: B. It is easy to implement and use

175. What is the purpose of an encoder?

  1. Option A: To convert an input signal into a coded output signal
  2. Option B: To store and retrieve digital data
  3. Option C: To perform arithmetic and logical operations on binary data
  4. Option D: To generate an output based on the input and the previous state
Show answer

Answer: A. To convert an input signal into a coded output signal

176. What is the difference between a binary encoder and a priority encoder?

  1. Option A: A binary encoder converts a binary input signal into an n-bit coded output signal, while a priority encoder generates a binary code corresponding to the highest priority input signal.
  2. Option B: A binary encoder generates a binary code corresponding to the highest priority input signal, while a priority encoder converts a binary input signal into an n-bit coded output signal.
  3. Option C: A binary encoder and a priority encoder are the same thing.
  4. Option D: A binary encoder and a priority encoder have no difference.
Show answer

Answer: A. A binary encoder converts a binary input signal into an n-bit coded output signal, while a priority encoder generates a binary code corresponding to the highest priority input signal.

177. What is the advantage of using a priority encoder?

  1. Option A: It simplifies the design of complex digital circuits
  2. Option B: It reduces the number of input lines required
  3. Option C: It increases the speed of data processing
  4. Option D: All of the above
Show answer

Answer: A. It simplifies the design of complex digital circuits

178. Which of the following is NOT a type of encoder?

  1. Option A: Binary encoder
  2. Option B: Priority encoder
  3. Option C: BCD encoder
  4. Option D: Multiplexer
Show answer

Answer: D. Multiplexer

179. What is the purpose of an encoder in digital logic?

  1. Option A: To convert a binary input signal into an n-bit coded output signal
  2. Option B: To generate a binary code corresponding to the highest priority input signal
  3. Option C: To convert a decimal input signal into a 4-bit BCD output signal
  4. Option D: To perform arithmetic operations on binary numbers
Show answer

Answer: A. To convert a binary input signal into an n-bit coded output signal

180. How many input lines and output lines does a binary encoder have?

  1. Option A: n input lines and m output lines
  2. Option B: 2^n input lines and n output lines
  3. Option C: n input lines and log2n output lines
  4. Option D: 10 input lines and 4 output lines
Show answer

Answer: B. 2^n input lines and n output lines

181. What is the purpose of a priority encoder in digital logic?

  1. Option A: To convert a binary input signal into an n-bit coded output signal
  2. Option B: To generate a binary code corresponding to the highest priority input signal
  3. Option C: To convert a decimal input signal into a 4-bit BCD output signal
  4. Option D: To perform arithmetic operations on binary numbers
Show answer

Answer: B. To generate a binary code corresponding to the highest priority input signal

182. How many input lines and output lines does a priority encoder have?

  1. Option A: n input lines and m output lines
  2. Option B: 2^n input lines and n output lines
  3. Option C: n input lines and log2n output lines
  4. Option D: 10 input lines and 4 output lines
Show answer

Answer: C. n input lines and log2n output lines

183. What is the purpose of a BCD encoder in digital logic?

  1. Option A: To convert a binary input signal into an n-bit coded output signal
  2. Option B: To generate a binary code corresponding to the highest priority input signal
  3. Option C: To convert a decimal input signal into a 4-bit BCD output signal
  4. Option D: To perform arithmetic operations on binary numbers
Show answer

Answer: C. To convert a decimal input signal into a 4-bit BCD output signal

184. How many input lines and output lines does a BCD encoder have?

  1. Option A: n input lines and m output lines
  2. Option B: 2^n input lines and n output lines
  3. Option C: n input lines and log2n output lines
  4. Option D: 10 input lines and 4 output lines
Show answer

Answer: D. 10 input lines and 4 output lines

185. What is the difference between a binary encoder and a priority encoder?

  1. Option A: A binary encoder converts a binary input signal into an n-bit coded output signal, while a priority encoder generates a binary code corresponding to the highest priority input signal.
  2. Option B: A binary encoder generates a binary code corresponding to the highest priority input signal, while a priority encoder converts a binary input signal into an n-bit coded output signal.
  3. Option C: A binary encoder converts a decimal input signal into a 4-bit BCD output signal, while a priority encoder generates a binary code corresponding to the highest priority input signal.
  4. Option D: A binary encoder has 2^n input lines and n output lines, while a priority encoder has n input lines and log2n output lines.
Show answer

Answer: D. A binary encoder has 2^n input lines and n output lines, while a priority encoder has n input lines and log2n output lines.

186. What is the purpose of using an encoder in data communication?

  1. Option A: To convert analog signals into digital signals
  2. Option B: To compress digital signals for efficient transmission
  3. Option C: To encrypt digital signals for secure transmission
  4. Option D: To convert digital signals into a coded output signal for transmission
Show answer

Answer: D. To convert digital signals into a coded output signal for transmission

187. What is the purpose of using a BCD encoder in digital signal processing?

  1. Option A: To convert a binary input signal into an n-bit coded output signal
  2. Option B: To generate a binary code corresponding to the highest priority input signal
  3. Option C: To convert a decimal input signal into a 4-bit BCD output signal
  4. Option D: To perform arithmetic operations on binary numbers
Show answer

Answer: C. To convert a decimal input signal into a 4-bit BCD output signal

188. What is the result of binary addition of 0110 and 0101?

  1. Option A: 1101
  2. Option B: 1111
  3. Option C: 1011
  4. Option D: 0011
Show answer

Answer: C. 1011

189. Which of the following is the correct binary addition of 1111 and 0011?

  1. Option A: 11010
  2. Option B: 10010
  3. Option C: 10100
  4. Option D: 10000
Show answer

Answer: B. 10010

190. What is the binary addition of 10101 and 11111?

  1. Option A: 110010
  2. Option B: 110111
  3. Option C: 110110
  4. Option D: 100010
Show answer

Answer: None of the options

The source’s answer, “110100”, is not one of the options.

191. What is the binary addition of 1101 and 0110?

  1. Option A: 1110
  2. Option B: 10010
  3. Option C: 10011
  4. Option D: 1100
Show answer

Answer: C. 10011

192. Which of the following represents the correct binary addition of 1010 and 0110?

  1. Option A: 1000
  2. Option B: 1011
  3. Option C: 10000
  4. Option D: 11111
Show answer

Answer: C. 10000

193. What is the result of binary addition of 11111 and 00001?

  1. Option A: 11110
  2. Option B: 100000
  3. Option C: 10000
  4. Option D: 11111
Show answer

Answer: B. 100000

194. Which of the following represents the correct binary addition of 111 and 101?

  1. Option A: 1100
  2. Option B: 1010
  3. Option C: 1111
  4. Option D: 1001
Show answer

Answer: A. 1100

195. What is the result of binary addition of 0101 and 0010?

  1. Option A: 0111
  2. Option B: 1000
  3. Option C: 1011
  4. Option D: 1001
Show answer

Answer: A. 0111

196. What is the binary sum of 1011 and 1101?

  1. Option A: 10011
  2. Option B: 10101
  3. Option C: 0110
  4. Option D: 0100
Show answer

Answer: None of the options

The source’s answer, “11000”, is not one of the options.

197. What is the binary sum of 1110 and 0111?

  1. Option A: 10001
  2. Option B: 10101
  3. Option C: 1110
  4. Option D: 100110
Show answer

Answer: B. 10101

198. What is the binary sum of 10101010 and 11001100?

  1. Option A: 10111111
  2. Option B: 10110110
  3. Option C: 1101-
  4. Option D: 0100
Show answer

Answer: None of the options

The source’s answer, “101110110”, is not one of the options.

199. What is the binary sum of 11111111 and 00000001?

  1. Option A: 11111110
  2. Option B: 11111111
  3. Option C: 10100100
  4. Option D: 100000000
Show answer

Answer: D. 100000000

200. Which of the following represents the correct binary addition of 1101 and 0011?

  1. Option A: 1111
  2. Option B: 1010
  3. Option C: 10011100
  4. Option D: 00000010
Show answer

Answer: None of the options

The source’s answer, “10000”, is not one of the options.

201. What is the binary addition of 1010 and 1101?

  1. Option A: 1000
  2. Option B: 1111
  3. Option C: 10111
  4. Option D: 00000000
Show answer

Answer: C. 10111

202. What is the carry generated when adding 1101 and 1011?

  1. Option A: 1
  2. Option B: 0
  3. Option C: 2
  4. Option D: 3
Show answer

Answer: A. 1

203. What is the binary sum of 111 and 101?

  1. Option A: 1011
  2. Option B: 1110
  3. Option C: 110
  4. Option D: 1001
Show answer

Answer: None of the options

The source’s answer, “1100”, is not one of the options.

204. What is the result of adding 1011 and 1110 using a full adder circuit?

  1. Option A: 1101
  2. Option B: 10000
  3. Option C: 11001
  4. Option D: 1010
Show answer

Answer: C. 11001

205. What is the binary sum of 1111 and 0111 using a half adder circuit?

  1. Option A: 1110
  2. Option B: 1101
  3. Option C: 1000
  4. Option D: 10110
Show answer

Answer: D. 10110

206. What is the result of adding 1011 and 1100 using a carry look-ahead adder (CLA) circuit?

  1. Option A: 1101
  2. Option B: 10100
  3. Option C: 10111
  4. Option D: 10011
Show answer

Answer: C. 10111

207. What is the binary sum of 1001 and 0110?

  1. Option A: 1011
  2. Option B: 1110
  3. Option C: 1111
  4. Option D: 0011
Show answer

Answer: C. 1111

208. What is the complement of the binary number 1111?

  1. Option A: 1110
  2. Option B: 0000
  3. Option C: 0001
  4. Option D: 1000
Show answer

Answer: B. 0000

209. What is the complement of the binary number 0011?

  1. Option A: 0010
  2. Option B: 1101
  3. Option C: 1100
  4. Option D: 0100
Show answer

Answer: C. 1100

210. What is the result of subtracting the binary number 0110 from the binary number 1011?

  1. Option A: 1001
  2. Option B: 0101
  3. Option C: 0010
  4. Option D: 1101
Show answer

Answer: B. 0101

211. What is the complement of the binary number 0001?

  1. Option A: 0000
  2. Option B: 1110
  3. Option C: 1111
  4. Option D: 0010
Show answer

Answer: B. 1110

212. What is the result of subtracting the binary number 1101 from the binary number 1110?

  1. Option A: 0000
  2. Option B: 0001
  3. Option C: 0011
  4. Option D: 0111
Show answer

Answer: B. 0001

213. What is the complement of the binary number 0101?

  1. Option A: 0100
  2. Option B: 1010
  3. Option C: 1011
  4. Option D: 1001
Show answer

Answer: B. 1010

214. What is the result of subtracting the binary number 0010 from the binary number 1111?

  1. Option A: 0101
  2. Option B: 1101
  3. Option C: 0110
  4. Option D: 1011
Show answer

Answer: B. 1101

215. What is the complement of the binary number 1000?

  1. Option A: 0111
  2. Option B: 1011
  3. Option C: 1001
  4. Option D: 1001
Show answer

Answer: A. 0111

216. What is the first step in binary subtraction?

  1. Option A: Find the complement of the minuend
  2. Option B: Invert all the bits of the minuend
  3. Option C: Find the complement of the subtrahend
  4. Option D: Invert all the bits of the subtrahend
Show answer

Answer: C. Find the complement of the subtrahend

217. What is the complement of the binary number 1011?

  1. Option A: 1100
  2. Option B: 0100
  3. Option C: 1000
  4. Option D: 0001
Show answer

Answer: B. 0100

218. What is the result of subtracting the binary number 1101 from the binary number 1111?

  1. Option A: 0010
  2. Option B: 0100
  3. Option C: 0001
  4. Option D: 1110
Show answer

Answer: A. 0010

219. What is the second step in binary subtraction?

  1. Option A: Find the complement of the subtrahend
  2. Option B: Invert all the bits of the subtrahend
  3. Option C: Find the complement of the minuend
  4. Option D: Invert all the bits of the minuend
Show answer

Answer: B. Invert all the bits of the subtrahend

220. What is the complement of the binary number 1001?

  1. Option A: 0110
  2. Option B: 0111
  3. Option C: 1010
  4. Option D: 1011
Show answer

Answer: A. 0110

221. What is the result of subtracting the binary number 1111 from the binary number 1111?

  1. Option A: 1111
  2. Option B: 0000
  3. Option C: 1110
  4. Option D: 0001
Show answer

Answer: B. 0000

222. What is the third step in binary subtraction?

  1. Option A: Add the complement to the minuend using binary subtraction
  2. Option B: Add the complement to the minuend using binary addition
  3. Option C: Subtract the complement from the minuend using binary subtraction
  4. Option D: Subtract the complement from the minuend using binary addition
Show answer

Answer: B. Add the complement to the minuend using binary addition

223. What is the difference between unsigned and signed binary numbers?

  1. Option A: Unsigned binary numbers have a signed bit while signed binary numbers do not.
  2. Option B: Unsigned binary numbers can represent only positive numbers while signed binary numbers can represent both positive and negative numbers.
  3. Option C: Unsigned binary numbers use a different base than signed binary numbers.
  4. Option D: There is no difference between unsigned and signed binary numbers.
Show answer

Answer: B. Unsigned binary numbers can represent only positive numbers while signed binary numbers can represent both positive and negative numbers.

224. Which of the following is the most significant bit in an 8-bit signed binary number?

  1. Option A: Bit 0
  2. Option B: Bit 1
  3. Option C: Bit 7
  4. Option D: There is no most significant bit
Show answer

Answer: C. Bit 7

225. What is the range of 8-bit signed binary numbers?

  1. Option A: 0 to 255
  2. Option B: -128 to 127
  3. Option C: -127 to 127
  4. Option D: 0 to 127
Show answer

Answer: B. -128 to 127

226. What is the range of unsigned 8-bit binary numbers?

  1. Option A: 0 to 127
  2. Option B: -128 to 127
  3. Option C: -127 to 127
  4. Option D: 0 to 255
Show answer

Answer: D. 0 to 255

227. Which of the following operations can be performed on signed binary numbers but not on unsigned binary numbers?

  1. Option A: Addition
  2. Option B: Subtraction
  3. Option C: Multiplication
  4. Option D: Division
Show answer

Answer: B. Subtraction

228. Which of the following operations can be performed on unsigned binary numbers?

  1. Option A: Only addition
  2. Option B: Addition and subtraction
  3. Option C: Multiplication and division
  4. Option D: Only subtraction
Show answer

Answer: B. Addition and subtraction

229. What is the range of unsigned 8-bit binary numbers?

  1. Option A: -128 to 127
  2. Option B: 0 to 256
  3. Option C: 0 to 127
  4. Option D: 0 to 128
Show answer

Answer: None of the options

The source’s answer, “0 to 255”, is not one of the options.

230. Which of the following is the correct representation of the signed binary number 11111111 in decimal using two's complement?

  1. Option A: -127
  2. Option B: -128
  3. Option C: 127
  4. Option D: -1
Show answer

Answer: D. -1

231. What is the range of signed 8-bit binary numbers using two's complement?

  1. Option A: -127 to 128
  2. Option B: -128 to 127
  3. Option C: -256 to 255
  4. Option D: -255 to 256
Show answer

Answer: B. -128 to 127

232. Which of the following operations can be performed on signed binary numbers using two's complement?

  1. Option A: Only addition
  2. Option B: Addition and subtraction
  3. Option C: Multiplication and division
  4. Option D: Only subtraction
Show answer

Answer: B. Addition and subtraction

233. What is the result of adding the signed binary numbers 0111 and 1010 using two's complement?

  1. Option A: 0001
  2. Option B: 1101
  3. Option C: 1111
  4. Option D: 1001
Show answer

Answer: A. 0001

234. What is the result of subtracting the signed binary numbers 1010 and 0111 using two's complement?

  1. Option A: 0001
  2. Option B: 1101
  3. Option C: 1001
  4. Option D: 1111
Show answer

Answer: None of the options

The source’s answer, “0011”, is not one of the options.

235. Which of the following is the correct representation of the signed binary number 11111000 in decimal using two's complement?

  1. Option A: -8
  2. Option B: -24
  3. Option C: 8
  4. Option D: 24
Show answer

Answer: A. -8

236. What is the complement of the binary number 1010?

  1. Option A: 0100
  2. Option B: 0010
  3. Option C: 1001
  4. Option D: 0110
Show answer

Answer: None of the options

The source’s answer, “0101”, is not one of the options.

237. What is the result of adding the signed binary numbers 0110 and 1011?

  1. Option A: 1101
  2. Option B: 1001
  3. Option C: 0001
  4. Option D: 0010
Show answer

Answer: C. 0001

238. Which of the following is the two's complement of the binary number 1101?

  1. Option A: 0010
  2. Option B: 0011
  3. Option C: 0101
  4. Option D: 0110
Show answer

Answer: B. 0011

239. What is the result of multiplying the unsigned binary numbers 1010 and 0011?

  1. Option A: 0010
  2. Option B: 0110
  3. Option C: 1110
  4. Option D: 1011
Show answer

Answer: None of the options

The source’s answer, “11110”, is not one of the options.

240. What is the result of subtracting the signed binary number 0101 from the signed binary number 1010?

  1. Option A: 1101
  2. Option B: 1001
  3. Option C: 0101
  4. Option D: 0011
Show answer

Answer: C. 0101

241. Which of the following is the sign bit in an 8-bit signed binary number?

  1. Option A: Bit 0
  2. Option B: Bit 1
  3. Option C: Bit 7
  4. Option D: There is no sign bit
Show answer

Answer: C. Bit 7

2.3 Sequential logic circuits

53 questions · AExE0203

242. What is another name for a simple SR flip-flop?

Aasadh 2081 exam
  1. Option A: A monostable multivibrator
  2. Option B: A bistable multivibrator
  3. Option C: An astable multivibrator
  4. Option D: A Schmitt trigger
Show hint

How many stable states does an SR flip-flop have?

Show answer

Answer: B. A bistable multivibrator

SR (Set-Reset) flip-flops are bistable multivibrators because they have two stable states (0 or 1) and can remain in either state until triggered to switch.

243. What is a T flip-flop?

Aasadh 2081 exam
  1. Option A: Has two inputs: T and CLK
  2. Option B: Can toggle between 0 and 1
  3. Option C: Has one output: Q
  4. Option D: All of the above
Show hint

T stands for Toggle.

Show answer

Answer: D. All of the above

T flip-flop has T and CLK inputs, one Q output, and toggles (switches state) on each clock pulse when T=1.

244. Which is a type of edge-triggered flip-flop with J and K inputs?

Aasadh 2081 exam
  1. Option A: D flip-flop
  2. Option B: JK flip-flop
  3. Option C: SR flip-flop
  4. Option D: T flip-flop
Show hint

J and K inputs provide set/reset/toggle functionality.

Show answer

Answer: B. JK flip-flop

JK flip-flop is a more versatile flip-flop with J (Set) and K (Reset) inputs that can set, reset, or toggle the output.

245. Which characteristic is true for a Master-Slave Flip-Flop?

Aasadh 2081 exam
  1. Option A: Has asynchronous reset
  2. Option B: Has transparent input
  3. Option C: Has hold input
  4. Option D: Has clock enable input
Show hint

Master-Slave allows independent control of operations.

Show answer

Answer: A. Has asynchronous reset

Master-Slave flip-flops typically have an asynchronous reset input for independent control.

246. Which type of register holds operands for arithmetic operations?

Aasadh 2081 exam
  1. Option A: Shift Register
  2. Option B: Parallel Register
  3. Option C: Serial Register
  4. Option D: Operand Register
Show hint

For fast access to operands.

Show answer

Answer: B. Parallel Register

Parallel registers hold operands for arithmetic and logical operations in the ALU.

247. What is the maximum count for a 4-bit asynchronous counter?

Aasadh 2081 exam
  1. Option A: 8
  2. Option B: 16
  3. Option C: 32
  4. Option D: 64
Show hint

2^n where n is number of bits.

Show answer

Answer: B. 16

A 4-bit counter can count from 0 to 15, giving maximum count of 16 (2^4).

248. Which is an example of application requiring synchronous counter?

Aasadh 2081 exam
  1. Option A: Digital clock
  2. Option B: Traffic light controller
  3. Option C: Computer processor
  4. Option D: Wireless router
Show hint

Which application needs precise, synchronized timing?

Show answer

Answer: A. Digital clock

Digital clocks use synchronous counters for accurate, synchronized time keeping.

249. What maximum data bits can be stored in n-bit shift register?

Aasadh 2081 exam
  1. Option A: n/2
  2. Option B: n-1
  3. Option C: 2^n
  4. Option D: n
Show hint

Each bit position stores one bit of data.

Show answer

Answer: D. n

An n-bit shift register can store maximum n data bits, one per bit position.

250. What is the primary function of an RS (Set–Reset) latch or flip-flop?

  1. Option A: To add two binary numbers
  2. Option B: To store a single bit of information using feedback
  3. Option C: To generate a clock signal
  4. Option D: To convert serial data to parallel form
Show hint

It has two stable states, representing 0 and 1, and maintains its state until changed.

Show answer

Answer: B. To store a single bit of information using feedback

An RS latch is a basic memory element built from two cross-coupled NOR or NAND gates. It has two inputs, S (Set) and R (Reset), and typically two outputs, Q and Q̄. When S is asserted, Q is forced to 1 and the latch stores a 1. When R is asserted, Q is forced to 0 and the latch stores a 0. When both S and R are inactive, the outputs feed back to keep the latch in its previous state, giving it memory. This is the fundamental idea of sequential logic: outputs depend on both current inputs and previous state. The RS latch has an illegal or undefined condition when both S and R are asserted simultaneously (for the NOR-based version), which is why more refined flip-flops (D, JK, etc.) were developed. Nevertheless, the RS latch is the conceptual foundation for understanding how digital circuits can remember information.

251. What distinguishes a gated (clocked) RS latch from a basic RS latch?

  1. Option A: It uses fewer gates
  2. Option B: Its state can only change when an enable or clock input is active
  3. Option C: It does not have a reset input
  4. Option D: It cannot store data
Show hint

Think of an extra control signal that "opens" or "closes" the latch.

Show answer

Answer: B. Its state can only change when an enable or clock input is active

A basic RS latch responds immediately to its S and R inputs at any time, which makes it sensitive to glitches and unsuitable for synchronous systems. A gated RS latch introduces an additional input, commonly called Enable (EN) or a level-type clock, and passes S and R to the latch only when this control input is asserted. Internally, S and R are ANDed with the enable signal before feeding the cross-coupled structure. When EN is low, the inner latch sees both S and R as inactive and thus holds its state regardless of changes on the external S and R. When EN is high, the latch responds to S and R just like a normal RS latch. This gating allows coordinated updates in sync with a clock, a key step toward building fully synchronous sequential circuits and flip-flops.

252. In an edge-triggered flip-flop, when does the state actually change?

  1. Option A: Whenever inputs change
  2. Option B: While the clock is high
  3. Option C: Only at the active edge (rising or falling) of the clock
  4. Option D: Randomly based on propagation delay
Show hint

The input is sampled at a specific instant, not during an entire level.

Show answer

Answer: C. Only at the active edge (rising or falling) of the clock

An edge-triggered flip-flop is designed so that it samples its input only during a very narrow window around a clock transition (either the rising edge or the falling edge, depending on the design). Outside that window, changes on the input do not affect the stored state. This behavior prevents multiple updates within one clock period and avoids race problems common with level-sensitive latches, where inputs might propagate repeatedly while the clock level is active. Internally, an edge-triggered flip-flop is often implemented as a master–slave combination or with specialized pulse-generation circuitry. Edge triggering is essential for synchronous design in microprocessors, where every storage element must update in a coordinated way once per clock cycle.

253. What design problem do Master–Slave flip-flops address?

  1. Option A: Clock generation
  2. Option B: Race conditions and unwanted multiple transitions within one clock pulse
  3. Option C: Excessive power consumption
  4. Option D: Input voltage level shifting
Show hint

They separate sampling and updating into two non-overlapping phases.

Show answer

Answer: B. Race conditions and unwanted multiple transitions within one clock pulse

A Master–Slave flip-flop consists of two latches in series: the master stage and the slave stage, driven by opposite phases of the clock. When the clock is high, the master latch is active and samples the input, but the slave latch is closed and holds its previous value. When the clock goes low, the master is closed (holding the sampled input), and the slave becomes active and copies the master's value to the output. This ensures that even if the input continues to change while the clock is high, those changes do not propagate directly to the output during the same clock period. It effectively turns a level-sensitive structure into a controlled edge-based behavior, thereby preventing race conditions where outputs might ripple through several stages during a single clock level.

254. What is a primary use of shift registers in digital systems?

  1. Option A: Implementing combinational logic
  2. Option B: Converting between serial and parallel data representations
  3. Option C: Generating clock pulses
  4. Option D: Storing programs permanently
Show hint

Data is moved bit by bit through flip-flops on each clock edge.

Show answer

Answer: B. Converting between serial and parallel data representations

A shift register is essentially a chain of flip-flops where the output of one feeds the input of the next. On each clock pulse, the content shifts one position to the left or right. A Serial-In Parallel-Out (SIPO) shift register accepts bits serially on a single input line and after enough clock pulses, its outputs collectively present the full word in parallel. A Parallel-In Serial-Out (PISO) register does the reverse. This capability is critical in serial communication interfaces, where data must be serialized for transmission over a single line but processed in parallel within the CPU. Shift registers are also used for simple time delays, implementing arithmetic shifts (multiply/divide by 2), and in some state machine designs.

255. How is an asynchronous (ripple) counter typically implemented?

  1. Option A: All flip-flops share the same clock edge
  2. Option B: The output of one flip-flop serves as the clock input for the next flip-flop
  3. Option C: Using only combinational gates and no flip-flops
  4. Option D: Using ROM to store the count sequence
Show hint

The clock "ripples" through the stages one by one.

Show answer

Answer: B. The output of one flip-flop serves as the clock input for the next flip-flop

In an asynchronous or ripple counter, only the first flip-flop in the chain receives the external clock signal. The output of this flip-flop then acts as the clock input for the next flip-flop, and so on down the chain. As a result, state changes propagate sequentially, so the later bits update slightly later than the earlier bits. This leads to the characteristic rippling effect through the binary count. While asynchronous counters are simple and require less combinational logic, their propagation delay accumulates across stages, limiting maximum clock frequency and causing short-lived invalid states during transitions. For higher-speed or more complex counting, synchronous counters are preferred.

256. What is the key feature of a synchronous counter compared to an asynchronous counter?

  1. Option A: It counts in Gray code instead of binary
  2. Option B: All flip-flops receive the same clock signal and change state simultaneously
  3. Option C: It does not require flip-flops
  4. Option D: It cannot be used for high-speed applications
Show hint

Think of everything driven by a single global clock edge.

Show answer

Answer: B. All flip-flops receive the same clock signal and change state simultaneously

In a synchronous counter, every flip-flop is clocked directly by the same clock signal, so they all see the clock edge at the same time. Combinational logic between flip-flops determines which ones toggle on a given edge, but the actual state updates are simultaneous. This removes the rippling effect and cumulative propagation delay found in asynchronous counters. Consequently, synchronous counters can operate at much higher frequencies and provide clean transitions from one valid count state to the next. This behavior matches the overall philosophy of synchronous digital design and is used widely in clock dividers, address generators, and event counters inside microprocessors and digital systems.

257. What is the main advantage of a D (Data) flip-flop over a basic RS flip-flop?

  1. Option A: It can store two bits instead of one
  2. Option B: It eliminates the invalid state by having only one data input
  3. Option C: It does not require a clock
  4. Option D: It is purely combinational
Show hint

D flip-flop ensures that S and R are never asserted simultaneously.

Show answer

Answer: B. It eliminates the invalid state by having only one data input

A basic RS flip-flop has an invalid condition when both S and R inputs are asserted simultaneously (in NOR-based form, that forces both Q and Q̄ to 0 temporarily, violating the requirement that they be complements). The D flip-flop solves this by taking a single data input D and internally generating S and R such that S and R cannot both be active at the same time. At a clock edge, the flip-flop simply copies D to Q and its complement to Q̄. Between clock edges, the outputs hold. This clean behavior, together with edge triggering, makes D flip-flops the fundamental building blocks of registers, shift registers, and many forms of synchronous sequential logic used inside microprocessors and digital systems.

258. Synchronous circuit that changes its state at specific clock signal is

NEC model set
  1. Option A: Event driven
  2. Option B: Clock driven
  3. Option C: Pulse driven
  4. Option D: Frequency driven
Show hint

Synchronous means coordinated with a clock signal. What term describes this timing mechanism?

Show answer

Answer: B. Clock driven

Synchronous circuits are clock-driven circuits where all state changes occur at specific moments synchronized with a clock signal. The clock signal provides timing pulses that coordinate the operation of all sequential elements in the circuit. All flip-flops and state machines change states on the rising or falling edge of the clock pulse, ensuring orderly operation and preventing race conditions. This is in contrast to asynchronous circuits which are event-driven and change states based on input changes whenever they occur. Clock-driven synchronous design is the standard in modern digital systems because it: (1) Prevents race conditions, (2) Provides predictable timing, (3) Simplifies verification and debugging, (4) Enables high-speed operation.

259. What stores data in a flip-flop (FF)?

Past question
  1. Option A: Output
  2. Option B: Input
  3. Option C: Memory
  4. Option D: Data
Show hint

Flip-flops are the basic memory element in digital electronics. They store bits of information.

Show answer

Answer: C. Memory

Memory stores data in a flip-flop. Flip-Flop Function: (1) Basic memory element in digital circuits, (2) Can store one bit of data (0 or 1), (3) Retains state until changed by input signal, (4) Fundamental building block of sequential logic. Memory Concept in Flip-Flops: (1) Bistable element - Two stable states, (2) State Q - Stores one bit, (3) State NOT Q - Complement, (4) Maintains state between clock pulses. How Memory Works: (1) Present input changes state, (2) New state becomes the stored value, (3) Retains this value until next input, (4) Output reflects stored state. Types of Flip-Flops: (1) SR (Set-Reset) - Two inputs, (2) JK - More versatile, (3) D (Data) - Captures input at clock edge, (4) T (Toggle) - Toggles on each pulse. Why Each Element: (1) Output - Reflects current state (data), (2) Input - Changes the state, (3) Memory - Stores the state, (4) Data - General term for stored information. Storage Mechanism: (1) Cross-coupled gates create bistability, (2) Two logic states stable (Q=1, Q'=0 or Q=0, Q'=1), (3) Circuit remains in state until forced to change. Applications: (1) Counters - Store count value, (2) Registers - Store multiple bits, (3) Shift registers - Store and move data, (4) State machines - Store current state. Electronic Implementation: (1) Using NAND gates (SR flip-flop), (2) Using transistors (more efficient), (3) Integrated circuits (SSI), (4) FPGA implementation. Timing: (1) Level-triggered - Responds to signal level, (2) Edge-triggered - Responds to transitions, (3) Clock control - Synchronous operation, (4) Setup/hold times - Timing constraints. This demonstrates understanding of sequential logic memory storage.

260. What is a gated flip-flop?

  1. Option A: A type of logic gate
  2. Option B: A type of sequential circuit
  3. Option C: A type of combinational circuit
  4. Option D: A type of adder
Show answer

Answer: B. A type of sequential circuit

261. Which type of flip-flop uses an AND gate to control the clock input?

  1. Option A: D flip-flop
  2. Option B: T flip-flop
  3. Option C: JK flip-flop
  4. Option D: SR flip-flop
Show answer

Answer: B. T flip-flop

262. What is the advantage of using gated flip-flops?

  1. Option A: They are faster than regular flip-flops
  2. Option B: They use less power than regular flip-flops
  3. Option C: They can selectively enable or disable the clock input
  4. Option D: They can be used in parallel circuits
Show answer

Answer: C. They can selectively enable or disable the clock input

263. Which type of flip-flop uses a NAND gate to control the J and K inputs?

  1. Option A: D flip-flop
  2. Option B: T flip-flop
  3. Option C: JK flip-flop
  4. Option D: SR flip-flop
Show answer

Answer: C. JK flip-flop

264. What happens to the output of a T gated flip-flop when the clock and gate inputs are both high?

  1. Option A: The output remains the same
  2. Option B: The output toggles between 0 and 1
  3. Option C: The output becomes 0
  4. Option D: The output becomes 1
Show answer

Answer: B. The output toggles between 0 and 1

265. Which of the following is not a type of gated flip-flop?

  1. Option A: D flip-flop
  2. Option B: SR flip-flop
  3. Option C: T flip-flop
  4. Option D: JK flip-flop
Show answer

Answer: B. SR flip-flop

266. Which of the following describes an asynchronous counter?

  1. Option A: A counter that uses external clock pulses to advance its count
  2. Option B: A counter that uses feedback to generate its own clock pulses
  3. Option C: A counter that counts in parallel
  4. Option D: A counter that counts in series
Show answer

Answer: A. A counter that uses external clock pulses to advance its count

267. Which type of asynchronous counter is also known as a ripple counter?

  1. Option A: Synchronous counter
  2. Option B: Binary counter
  3. Option C: Johnson counter
  4. Option D: Modulus counter
Show answer

Answer: B. Binary counter

268. How many flip-flops are needed to implement a 3-bit asynchronous counter?

  1. Option A: 2
  2. Option B: 3
  3. Option C: 4
  4. Option D: 5
Show answer

Answer: B. 3

269. What is the maximum number of states a 4-bit asynchronous counter can have?

  1. Option A: 4
  2. Option B: 8
  3. Option C: 12
  4. Option D: 16
Show answer

Answer: D. 16

270. In an asynchronous counter, which flip-flop receives the external clock signal?

  1. Option A: The first flip-flop
  2. Option B: The last flip-flop
  3. Option C: All flip-flops receive the external clock signal
  4. Option D: None of the flip-flops receive the external clock signal
Show answer

Answer: A. The first flip-flop

271. Which of the following is an advantage of asynchronous counters over synchronous counters?

  1. Option A: Asynchronous counters are faster
  2. Option B: Asynchronous counters are more reliable
  3. Option C: Asynchronous counters require fewer components
  4. Option D: Asynchronous counters are easier to design
Show answer

Answer: C. Asynchronous counters require fewer components

272. In a 3-bit asynchronous counter, what is the maximum count sequence that can be generated?

  1. Option A: 0,1,2,3,4,5,6,7
  2. Option B: 0,1,2,3,2,1,0
  3. Option C: 0,1,2, 1.0, 1.2,1.D
  4. Option D: 0, 1, 0, 1 0, 1, 0, 1
Show answer

Answer: A. 0,1,2,3,4,5,6,7

273. Which type of asynchronous counter uses a series of D flip-flops?

  1. Option A: Binary counter
  2. Option B: Ripple counter
  3. Option C: Johnson counter
  4. Option D: Modulus counter
Show answer

Answer: C. Johnson counter

274. In a Johnson counter, how many states are there for n flip-flops?

  1. Option A: 2n
  2. Option B: n
  3. Option C: n/2
  4. Option D: 2^n-1
Show answer

Answer: A. 2n

275. What is the main disadvantage of asynchronous counters?

  1. Option A: They are slower than synchronous counters
  2. Option B: They suffer from glitches in the output waveform
  3. Option C: They are more complex to design than synchronous counters
  4. Option D: They are not suitable for use in digital circuits
Show answer

Answer: A. They are slower than synchronous counters

276. What is an asynchronous counter?

  1. Option A: A counter that uses asynchronous clock
  2. Option B: A counter that uses synchronous clock pulses
  3. Option C: A counter that uses both synchronous and asynchronous clock pulses
  4. Option D: A counter that does not use clock pulses
Show answer

Answer: A. A counter that uses asynchronous clock

277. What is the basic building block of an asynchronous counter?

  1. Option A: Flip-flop
  2. Option B: Encoder
  3. Option C: Decoder
  4. Option D: Multiplexer
Show answer

Answer: A. Flip-flop

278. How many flip-flops are required for a 3-bit asynchronous counter?

  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: 4
Show answer

Answer: C. 3

279. Which type of flip-flop is used in an asynchronous counter?

  1. Option A: D flip-flop
  2. Option B: T flip-flop
  3. Option C: JK flip-flop
  4. Option D: All of the above
Show answer

Answer: D. All of the above

280. What is the advantage of using an asynchronous counter over a synchronous counter?

  1. Option A: Higher speed
  2. Option B: Lower power consumption
  3. Option C: Lower cost
  4. Option D: Simpler design
Show answer

Answer: D. Simpler design

281. In an asynchronous counter, what is the function of the enable input?

  1. Option A: To start the counting process
  2. Option B: To stop the counting process
  3. Option C: To reset the counter
  4. Option D: To enable or disable the counting process
Show answer

Answer: D. To enable or disable the counting process

282. What is the propagation delay of an asynchronous counter?

  1. Option A: The time it takes for the counter to start counting
  2. Option B: The time it takes for the counter to stop counting
  3. Option C: The time it takes for the output of one flip-flop to propagate to the input of the next flip-flop
  4. Option D: The time it takes for the clock pulse to propagate through the counter
Show answer

Answer: C. The time it takes for the output of one flip-flop to propagate to the input of the next flip-flop

283. What is the drawback of using an asynchronous counter?

  1. Option A: Higher power consumption
  2. Option B: Higher cost
  3. Option C: Limited speed
  4. Option D: Limited scalability
Show answer

Answer: C. Limited speed

284. Which of the following is an example of an application that requires an asynchronous counter?

  1. Option A: Digital clock
  2. Option B: Traffic light controller
  3. Option C: Computer processor
  4. Option D: Wireless router
Show answer

Answer: A. Digital clock

285. What is a synchronous counter?

  1. Option A: A counter that uses synchronous clock pulses
  2. Option B: A counter that uses asynchronous clock pulses
  3. Option C: A counter that uses both synchronous and asynchronous clock pulses
  4. Option D: A counter that does not use clock pulses
Show answer

Answer: A. A counter that uses synchronous clock pulses

286. What is the basic building block of a synchronous counter?

  1. Option A: Flip-flop
  2. Option B: Encoder
  3. Option C: Decoder
  4. Option D: Multiplexer
Show answer

Answer: A. Flip-flop

287. How many flip-flops are required for a 4-bit synchronous counter?

  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: 4
Show answer

Answer: D. 4

288. Which type of flip-flop is used in a synchronous counter?

  1. Option A: D flip-flop
  2. Option B: T flip-flop
  3. Option C: JK flip-flop
  4. Option D: All of the above
Show answer

Answer: D. All of the above

289. What is the maximum count for a 3-bit synchronous counter?

  1. Option A: 4
  2. Option B: 6
  3. Option C: 8
  4. Option D: 10
Show answer

Answer: C. 8

290. What is the advantage of using a synchronous counter over an asynchronous counter?

  1. Option A: Simpler design
  2. Option B: Lower power consumption
  3. Option C: Lower cost
  4. Option D: Higher speed
Show answer

Answer: D. Higher speed

291. In a synchronous counter, what is the function of the clock input?

  1. Option A: To start the counting process
  2. Option B: To stop the counting process
  3. Option C: To reset the counter
  4. Option D: To synchronize the counting process
Show answer

Answer: D. To synchronize the counting process

292. What is the propagation delay of a synchronous counter?

  1. Option A: The time it takes for the counter to start counting
  2. Option B: The time it takes for the counter to stop counting
  3. Option C: The time it takes for the output of one flip-flop to propagate to the input of the next flip-flop
  4. Option D: The time it takes for the clock pulse to propagate through the counter
Show answer

Answer: D. The time it takes for the clock pulse to propagate through the counter

293. What is the drawback of using a synchronous counter?

  1. Option A: Higher power consumption
  2. Option B: Higher cost
  3. Option C: Limited speed
  4. Option D: Limited scalability
Show answer

Answer: A. Higher power consumption

294. Which of the following is an example of an application that requires a synchronous counter?

  1. Option A: Digital clock
  2. Option B: Traffic light controller
  3. Option C: Computer processor
  4. Option D: Wireless router
Show answer

Answer: C. Computer processor

2.4 Microprocessor

50 questions · AExE0204

295. How many 16-bit registers are there in the 8085 microprocessor?

Aasadh 2081 exam
  1. Option A: 1
  2. Option B: 2
  3. Option C: 3
  4. Option D: 4
Show hint

The two primary 16-bit registers are Stack Pointer and Program Counter.

Show answer

Answer: B. 2

The 8085 has 2 main 16-bit registers: Stack Pointer (SP) and Program Counter (PC).

296. Which of the following is a special purpose register?

Aasadh 2081 exam
  1. Option A: Instruction register
  2. Option B: Program counter
  3. Option C: Accumulator
  4. Option D: Temporary register
Show hint

Which register has a dedicated specific function?

Show answer

Answer: B. Program counter

Program Counter is a special-purpose register that holds the address of the next instruction to be executed.

297. What is the 8086 data bus width?

Aasadh 2081 exam
  1. Option A: 8-bit
  2. Option B: 16-bit
  3. Option C: 32-bit
  4. Option D: 64-bit
Show hint

The 8086 is a 16-bit microprocessor from the 1980s.

Show answer

Answer: B. 16-bit

The 8086 microprocessor has a 16-bit data bus, which was significant advancement over the 8-bit 8085.

298. How many flip-flops are required for representing flags in 8085?

Aasadh 2081 exam
  1. Option A: 5
  2. Option B: 6
  3. Option C: 8
  4. Option D: 10
Show hint

Five status flags in 8085: S, Z, AC, P, CY

Show answer

Answer: A. 5

The 8085 has 5 flip-flops for flags: Sign (S), Zero (Z), Auxiliary Carry (AC), Parity (P), and Carry (CY).

299. What are the main internal components of a typical microprocessor?

  1. Option A: ALU, registers, control unit, and internal buses
  2. Option B: Only memory and I/O ports
  3. Option C: Just a clock and an ALU
  4. Option D: ROM, RAM, and cache only
Show hint

Think of how instructions are fetched, decoded, and executed.

Show answer

Answer: A. ALU, registers, control unit, and internal buses

A microprocessor’s internal architecture is usually described in terms of four major blocks: (1) The Arithmetic Logic Unit (ALU), which performs arithmetic operations like addition and subtraction and logical operations like AND, OR, XOR, and NOT; (2) The register file, including general-purpose registers, special-purpose registers such as the accumulator, program counter, stack pointer, and status flags; (3) The control unit, which fetches instructions from memory, decodes them, and generates the control signals needed to operate the ALU, registers, and buses; (4) Internal buses (data bus, address bus, and sometimes dedicated control buses) that move data and addresses between these blocks. Additional structures like instruction pipelines, caches, and branch predictors build on top of this core architecture in more advanced processors.

300. What is the primary role of the accumulator register in many classic microprocessors (such as 8085)?

  1. Option A: To hold the address of the next instruction
  2. Option B: To store one operand and the result of most arithmetic and logic operations
  3. Option C: To count the number of executed instructions
  4. Option D: To store stack addresses
Show hint

Most arithmetic and logical instructions implicitly use this register.

Show answer

Answer: B. To store one operand and the result of most arithmetic and logic operations

In accumulator-based architectures, the accumulator is the central working register. Instructions like ADD B, SUB C, ANA D, ORA E typically use the accumulator as one operand and then store the result back into it. For example, ADD B means A ← A + B. This design simplifies the instruction set and required hardware, since many instructions do not need to encode both source and destination registers explicitly. Although modern RISC processors favor a larger set of general-purpose registers rather than a single special accumulator, the conceptual role remains similar: fast registers hold intermediate results and operands to minimize memory accesses.

301. What does the Program Counter (PC) register store?

  1. Option A: The total number of executed instructions
  2. Option B: The address of the current or next instruction to be fetched
  3. Option C: The address of the top of the stack
  4. Option D: The result of the last arithmetic operation
Show hint

It keeps track of the control flow of the program.

Show answer

Answer: B. The address of the current or next instruction to be fetched

The Program Counter (PC) is a special-purpose register whose content points to the memory address of the instruction that the processor will fetch next. During sequential execution, after fetching an instruction, the PC is incremented by the instruction length so that it points to the next instruction in memory. Control transfer instructions (jumps, branches, calls, returns) modify the PC explicitly to implement loops, conditionals, and subroutines. When an interrupt occurs, the processor saves the current PC (often on the stack) and loads the PC with the address of the corresponding Interrupt Service Routine. When the ISR finishes, it restores the PC so that normal program execution resumes from the correct point.

302. What is assembly language best described as?

  1. Option A: A portable high-level language
  2. Option B: A human-readable form of machine instructions specific to a processor
  3. Option C: A way to describe circuits graphically
  4. Option D: A type of microcode stored in ROM
Show hint

Each mnemonic closely corresponds to a machine opcode.

Show answer

Answer: B. A human-readable form of machine instructions specific to a processor

Assembly language provides mnemonics like MOV, ADD, JMP in place of raw numeric opcodes. Each assembly instruction typically corresponds very closely to a single machine instruction of a specific CPU architecture. Assemblers translate this human-friendly text into the binary machine code that the processor executes. Because assembly is architecture-specific, 8085 assembly will be quite different from ARM or x86 assembly. Programmers use assembly when they need precise control over hardware, need to optimize critical sections, or are implementing very low-level software like bootloaders, interrupt handlers, or hardware drivers.

303. What is the function of the Stack Pointer (SP) in a microprocessor?

  1. Option A: To point to the next instruction
  2. Option B: To hold the address of the top element of the stack
  3. Option C: To store the number of stack frames
  4. Option D: To cache recent memory accesses
Show hint

The stack is a LIFO structure used for calls, returns, and local storage.

Show answer

Answer: B. To hold the address of the top element of the stack

The Stack Pointer (SP) holds the address of the current top of the stack, which is a region of memory used for temporary storage such as return addresses, saved registers, and local variables. On a PUSH operation, the SP is adjusted (often decremented in architectures where the stack grows downward) and the new value is used as the address where data is stored. On a POP, data is read from the current SP address and the SP is adjusted in the opposite direction. During function calls, the return address is pushed to the stack, and during returns, it is popped back into the program counter. Correct management of SP is essential for reliable subroutine calls, recursion, interrupt handling, and context switching.

304. What is carried on the address bus in a microprocessor system?

  1. Option A: Data values to be read or written
  2. Option B: Memory or I/O addresses to be accessed
  3. Option C: Control signals like Read and Write
  4. Option D: Clock pulses
Show hint

It selects which location in memory or which device is involved in a transfer.

Show answer

Answer: B. Memory or I/O addresses to be accessed

The address bus is a set of lines that carries the binary address specifying which memory location or I/O port the CPU intends to read from or write to. For a 16-bit address bus, the processor can address 2^16 = 65,536 distinct locations. For a 32-bit address bus, the space is 4 GB, and so on. When the CPU initiates a memory operation, it places an address on the address bus, asserts the appropriate control signals (such as RD or WR), and the memory subsystem decodes that address to select the correct memory chip and cell. In systems with memory-mapped I/O, peripheral devices are also selected based on particular address ranges, using essentially the same address bus mechanism.

305. What is the role of the control bus in a microprocessor system?

  1. Option A: To transmit only data bits
  2. Option B: To carry only addresses
  3. Option C: To carry signals such as Read, Write, Interrupt, and Reset that coordinate operations
  4. Option D: To supply power to memory chips
Show hint

Think about non-data, non-address signals that orchestrate each transfer.

Show answer

Answer: C. To carry signals such as Read, Write, Interrupt, and Reset that coordinate operations

The control bus is a collection of individual control lines that the CPU uses to coordinate and manage its interactions with memory and I/O devices. Common signals include RD (read), WR (write), MEM/IO (distinguishing memory access from I/O access), interrupt request lines, interrupt acknowledge lines, bus request and grant lines for DMA, RESET, and sometimes clock-related signals. During a memory read, for example, the CPU will place the address on the address bus, assert MEM and RD, and then wait for the memory to place the requested data on the data bus. The control bus makes sure all subsystems interpret and respond to operations consistently and at the right time.

306. Bandwidth of microprocessor represents

NEC model set
  1. Option A: Clock speed
  2. Option B: Width of internal bus
  3. Option C: Number of bits processed per instruction
  4. Option D: Number of bits processed per second
Show hint

In processor terminology, bandwidth refers to the data width, not frequency. What determines how many bits can be moved at once?

Show answer

Answer: B. Width of internal bus

In microprocessor terminology, bandwidth refers to the width of the internal bus (data bus) in bits. This indicates how many bits of data can be transferred simultaneously within the processor. For example, an 8-bit microprocessor has an 8-bit data bus bandwidth, a 32-bit processor has 32-bit bandwidth. This is different from (1) Clock speed, which measures frequency in Hz, (2) Instruction throughput, which is bits per instruction, or (3) Data transfer rate, which is bits per second. The bus width directly affects the amount of data that can be processed in one clock cycle. A wider bus means more data can be moved, potentially improving performance. This is a fundamental characteristic distinguishing processor generations (8-bit, 16-bit, 32-bit, 64-bit processors).

307. In assembly language, what type of addressing mode is used in the instruction MOV A, M?

Recalled from Jan 2026 exam
  1. Option A: Register addressing
  2. Option B: Indirect register addressing
  3. Option C: Direct addressing
  4. Option D: Immediate addressing
Show hint

M typically represents memory address stored in a register. What addressing mode is this?

Show answer

Answer: B. Indirect register addressing

The instruction MOV A, M uses indirect register addressing mode. In this mode, the memory address is stored in a register (M typically refers to the address in the HL register pair or a similar register). The instruction fetches data from the memory address stored in the register and moves it to register A. Indirect addressing is useful for accessing arrays or dynamic data structures where the address is determined at runtime. Direct addressing would specify the address explicitly. Immediate addressing would have the data value directly. Register addressing would move from one register to another.

308. What is a microprocessor?

  1. Option A: A computer memory device
  2. Option B: A device that performs arithmetic and logical operations
  3. Option C: A device that stores data
  4. Option D: A device that displays data
Show answer

Answer: B. A device that performs arithmetic and logical operations

309. Which of the following is not a component of the internal architecture of a microprocessor?

  1. Option A: Arithmetic and Logic Unit (ALU)
  2. Option B: Control Unit (CU)
  3. Option C: Memory Unit
  4. Option D: Input/Output Unit (IOU)
Show answer

Answer: D. Input/Output Unit (IOU)

310. What is the function of the Control Unit (CU) in a microprocessor?

  1. Option A: It performs arithmetic and logical operations
  2. Option B: It stores data
  3. Option C: It controls the flow of data within the microprocessor
  4. Option D: It interfaces with input/output devices
Show answer

Answer: C. It controls the flow of data within the microprocessor

311. What is the function of the Arithmetic and Logic Unit (ALU) in a microprocessor?

  1. Option A: It controls the flow of data within the microprocessor
  2. Option B: It performs arithmetic and logical operations
  3. Option C: It stores data
  4. Option D: It interfaces with Input/output devices
Show answer

Answer: B. It performs arithmetic and logical operations

312. Which of the following is not a feature of a microprocessor?

  1. Option A: Interrupt handling capability
  2. Option B: Pipelining
  3. Option C: Cache memory
  4. Option D: Secondary storage
Show answer

Answer: D. Secondary storage

313. What is pipelining in a microprocessor?

  1. Option A: The process of dividing instructions into smaller parts
  2. Option B: The process of executing multiple instructions simultaneously
  3. Option C: The process of storing frequently accessed data
  4. Option D: The process of handling interrupts
Show answer

Answer: B. The process of executing multiple instructions simultaneously

314. What is the function of the Memory Management Unit (MMU) in a microprocessor?

  1. Option A: It performs arithmetic and logical operations
  2. Option B: It stores data
  3. Option C: It manages the memory resources of the system
  4. Option D: It interfaces with input/output devices
Show answer

Answer: C. It manages the memory resources of the system

315. Which of the following is an example of an instruction set architecture (ISA)?

  1. Option A: HTML
  2. Option B: x86
  3. Option C: Java
  4. Option D: Python
Show answer

Answer: B. x86

316. Which of the following is a type of bus in a microprocessor?

  1. Option A: Address bus
  2. Option B: Data bus
  3. Option C: Control bus
  4. Option D: All of the above
Show answer

Answer: D. All of the above

317. What is the function of the ALU in a microprocessor?

  1. Option A: To execute instructions
  2. Option B: To store data
  3. Option C: To perform arithmetic and logical operations
  4. Option D: To communicate with external devices
Show answer

Answer: C. To perform arithmetic and logical operations

318. Which of the following is NOT a register in a microprocessor?

  1. Option A: Program Counter
  2. Option B: Instruction Register
  3. Option C: Data Memory Register
  4. Option D: Input Output Register
Show answer

Answer: D. Input Output Register

319. What is the function of the Program Counter in a microprocessor?

  1. Option A: To store data
  2. Option B: To execute instructions
  3. Option C: To perform arithmetic and logical operations
  4. Option D: To store the address of the next instruction to be executed
Show answer

Answer: D. To store the address of the next instruction to be executed

320. Which bus is used to transfer data between the CPU and memory in a microprocessor?

  1. Option A: Address bus
  2. Option B: Data bus
  3. Option C: Control bus
  4. Option D: All of the above
Show answer

Answer: B. Data bus

321. Which of the following is NOT a component of the Control Unit in a microprocessor?

  1. Option A: Instruction Decoder
  2. Option B: Clock Generator
  3. Option C: Address Register
  4. Option D: Control Logic
Show answer

Answer: C. Address Register

322. What is the function of the Instruction Register in a microprocessor?

  1. Option A: To store data
  2. Option B: To execute instructions
  3. Option C: To perform arithmetic and logical operations
  4. Option D: To store the current instruction being executed
Show answer

Answer: D. To store the current instruction being executed

323. Which of the following is NOT a feature of a microprocessor?

  1. Option A: Multitasking
  2. Option B: Multiprocessing
  3. Option C: Multithreading
  4. Option D: Multiuser
Show answer

Answer: D. Multiuser

324. Which of the following components is responsible for fetching instructions from memory in a microprocessor?

  1. Option A: Control Unit
  2. Option B: ALU
  3. Option C: Interrupt Controller
  4. Option D: Input/Output Controller
Show answer

Answer: A. Control Unit

325. Which of the following is an example of a microprocessor?

  1. Option A: Intel Core i7
  2. Option B: Nvidia GeForce RTX 3080
  3. Option C: Raspberry Pi 4
  4. Option D: Apple M1
Show answer

Answer: A. Intel Core i7

326. What is Assembly Language?

  1. Option A: A high-level programming language
  2. Option B: A low-level programming language
  3. Option C: An interpreted programming language
  4. Option D: An object-oriented programming language
Show answer

Answer: B. A low-level programming language

327. Which of the following is NOT a basic data type in Assembly Language?

  1. Option A: Integer
  2. Option B: Floating-point
  3. Option C: Character
  4. Option D: Boolean
Show answer

Answer: D. Boolean

328. Which of the following is the correct syntax to define a variable in Assembly Language?

  1. Option A: VAR name, data type, value
  2. Option B: name data type value
  3. Option C: data type name value
  4. Option D: NAME VAR data type, value
Show answer

Answer: B. name data type value

329. What is the function of the Assembler in Assembly Language Programming?

  1. Option A: To execute Assembly Language code
  2. Option B: To translate Assembly Language code into machine code
  3. Option C: To debug Assembly Language code
  4. Option D: To optimize Assembly Language code
Show answer

Answer: B. To translate Assembly Language code into machine code

330. Which register is used to store the memory address in Assembly Language Programming?

  1. Option A: AX
  2. Option B: BX
  3. Option C: CX
  4. Option D: IP
Show answer

Answer: B. BX

331. Which of the following is NOT a branch instruction in Assembly Language Programming?

  1. Option A: JMP
  2. Option B: JZ
  3. Option C: JNZ
  4. Option D: MOV
Show answer

Answer: D. MOV

332. What is the function of the RET instruction in Assembly Language Programming?

  1. Option A: To return a value from a function
  2. Option B: To jump to a memory address
  3. Option C: To store a value in a register
  4. Option D: To return from a subroutine
Show answer

Answer: D. To return from a subroutine

333. Which of the following is the correct syntax for the ADD instruction in Assembly Language Programming?

  1. Option A: ADD source, destination
  2. Option B: ADD destination, source
  3. Option C: ADD source
  4. Option D: ADD destination
Show answer

Answer: B. ADD destination, source

334. Which of the following is an example of an addressing mode in Assembly Language Programming?

  1. Option A: Immediate
  2. Option B: Direct
  3. Option C: Indirect
  4. Option D: All of the above
Show answer

Answer: D. All of the above

335. What is Assembly Language Programming?

  1. Option A: A high-level programming language
  2. Option B: A low-level programming language
  3. Option C: A scripting language
  4. Option D: A markup language
Show answer

Answer: B. A low-level programming language

336. Which of the following is NOT a common Assembly Language instruction?

  1. Option A: MOV
  2. Option B: ADD
  3. Option C: PRINT
  4. Option D: JUMP
Show answer

Answer: C. PRINT

337. Which instruction is used to move data from a register to memory in Assembly Language Programming?

  1. Option A: MOV
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: PUSH
Show answer

Answer: A. MOV

338. Which instruction is used to perform addition in Assembly Language Programming?

  1. Option A: MOV
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: PUSH
Show answer

Answer: B. ADD

339. Which instruction is used to jump to a specific memory location in Assembly Language Programming?

  1. Option A: MOV
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: PUSH
Show answer

Answer: C. JMP

340. Which of the following is NOT a register in Assembly Language Programming?

  1. Option A: A
  2. Option B: B
  3. Option C: C
  4. Option D: D
Show answer

Answer: D. D

341. Which instruction is used to compare two values in Assembly Language Programming?

  1. Option A: CMP
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: PUSH
Show answer

Answer: A. CMP

342. Which instruction is used to perform multiplication in Assembly Language Programming?

  1. Option A: MUL
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: POP
Show answer

Answer: A. MUL

343. Which instruction is used to move data from memory to a register in Assembly Language Programming?

  1. Option A: MOV
  2. Option B: ADD
  3. Option C: JMP
  4. Option D: PUSH
Show answer

Answer: A. MOV

344. Which of the following is NOT a common Assembly Language Directive?

  1. Option A: DB
  2. Option B: DW
  3. Option C: DS
  4. Option D: INPUT
Show answer

Answer: D. INPUT

2.5 Microprocessor system

24 questions · AExE0205

345. Which port of 8255 PPI is capable of bi-directional handshaking?

Aasadh 2081 exam
  1. Option A: Port A
  2. Option B: Port B
  3. Option C: Port C
  4. Option D: All of the above
Show hint

Which port specifically supports bidirectional handshaking in 8255?

Show answer

Answer: B. Port B

Port B of the 8255 PPI is capable of performing bi-directional handshaking with interfaced devices.

346. What is the fundamental difference between RAM and ROM?

  1. Option A: RAM is non-volatile, ROM is volatile
  2. Option B: RAM is volatile, ROM is non-volatile
  3. Option C: Both are volatile but ROM is faster
  4. Option D: Both are non-volatile but RAM is larger
Show hint

Consider what happens to stored data when power is turned off.

Show answer

Answer: B. RAM is volatile, ROM is non-volatile

Random Access Memory (RAM) loses its stored data when power is removed, which makes it volatile. It is used for temporary storage of code and data during program execution. Read-Only Memory (ROM), in contrast, retains its data even when power is off, making it non-volatile. ROM (and its modern variants like Flash) is typically used to store firmware, bootloaders, and other code that must be preserved across power cycles. In a microprocessor-based system, the CPU typically starts execution from a fixed address in ROM after reset, where boot code resides, and then may copy or map parts of that program into RAM for faster execution.

347. What is the main purpose of cache memory in a microprocessor system?

  1. Option A: To permanently store the operating system
  2. Option B: To buffer I/O devices
  3. Option C: To reduce the average time to access data by storing frequently used data closer to the CPU
  4. Option D: To increase the size of main memory
Show hint

Think of temporal and spatial locality of reference.

Show answer

Answer: C. To reduce the average time to access data by storing frequently used data closer to the CPU

Cache memory is a small, fast memory that sits between the CPU and main memory (RAM). It stores copies of data and instructions that are frequently accessed or are close in address to recently accessed items. Due to temporal locality, code or data recently used is likely to be used again soon; due to spatial locality, addresses near recently used addresses are likely to be accessed next. When the CPU requests data, the cache is checked first. If the data is found (cache hit), it can be supplied much faster than from RAM. If not (cache miss), it must be fetched from main memory and also stored in the cache for future use. Multi-level cache hierarchies (L1, L2, L3) further optimize this behavior. Efficient cache design and cache-friendly code can significantly improve performance, especially in modern processors where CPU speed is much higher than main memory speed.

348. What is a Programmable Peripheral Interface (such as the Intel 8255) used for?

  1. Option A: Generating clock signals for the CPU
  2. Option B: Providing programmable parallel I/O ports that can be configured as input or output by software
  3. Option C: Storing microprocessor instructions in non-volatile form
  4. Option D: Converting analog signals to digital
Show hint

It gives flexible general-purpose I/O without rewiring hardware.

Show answer

Answer: B. Providing programmable parallel I/O ports that can be configured as input or output by software

A PPI like the Intel 8255 offers several 8-bit ports (usually named Port A, Port B, and Port C) whose direction (input or output) and mode of operation can be defined by writing a control word to an internal control register. This allows the same physical pins to be repurposed in different configurations depending on the needs of the software. Modes include simple input/output and strobed or handshake modes for more reliable data transfer. Without such a device, the designer would have to hardwire discrete latches and buffers and could not easily reconfigure them at runtime. In early microprocessor systems, PPIs were standard building blocks for connecting to keyboards, displays, printers, and other parallel devices.

349. What is the key difference between synchronous and asynchronous serial transmission?

  1. Option A: Synchronous uses a shared clock signal; asynchronous uses start and stop bits for each word
  2. Option B: Synchronous can only transmit data, asynchronous can transmit control signals
  3. Option C: Asynchronous requires more wires than synchronous
  4. Option D: There is no timing difference, only different voltage levels
Show hint

How does the receiver know when to sample each bit?

Show answer

Answer: A. Synchronous uses a shared clock signal; asynchronous uses start and stop bits for each word

In synchronous serial transmission, the sender and receiver share a clock signal (either as a separate line or embedded in the data stream using coding schemes). The receiver uses this clock to sample bits at precise intervals, and data is usually sent in continuous blocks without start/stop bits per character. Protocols like SPI and I²C are synchronous. In asynchronous transmission, such as classic UART/RS-232, each character is framed with a start bit and one or more stop bits, and each side has its own clock, which is nominally at the agreed baud rate but not exactly phase-aligned. The receiver detects the start bit’s edge and then samples the following data bits at calculated intervals. Asynchronous schemes are simpler in wiring (no dedicated clock line) but have more overhead bits and slightly more susceptibility to clock drift.

350. Which of the following best describes RS-232?

  1. Option A: A parallel bus standard for memory modules
  2. Option B: An asynchronous serial communication standard with voltage swings around ±12 V
  3. Option C: A wireless communication protocol
  4. Option D: A synchronous serial bus like SPI
Show hint

Think of the classic PC COM port.

Show answer

Answer: B. An asynchronous serial communication standard with voltage swings around ±12 V

RS-232 is a long-standing standard for serial communication between data terminal equipment (like a PC) and data communication equipment (like a modem). It uses asynchronous framing with start and stop bits and relatively low baud rates (9600, 19200, etc.). The voltage levels are bipolar: logic 1 (mark) is represented by a negative voltage (e.g., −12 V) and logic 0 (space) by a positive voltage (e.g., +12 V), which is inverted with respect to TTL logic. This necessitates line driver/receiver ICs (like MAX232) to interface between TTL-level UART pins and RS-232 cabling. Though now largely replaced by USB in consumer devices, RS-232 remains common in industrial, embedded, and legacy systems.

351. What does Direct Memory Access (DMA) allow in a microprocessor system?

  1. Option A: The CPU to access ROM directly
  2. Option B: Peripheral devices to transfer data directly to/from memory without continuous CPU involvement
  3. Option C: Memory to access other memory chips without a bus
  4. Option D: The CPU to execute instructions directly from I/O ports
Show hint

It reduces CPU overhead for large data transfers.

Show answer

Answer: B. Peripheral devices to transfer data directly to/from memory without continuous CPU involvement

DMA is a mechanism where a DMA controller (either standalone or integrated) manages data transfers between memory and peripherals such as disk controllers, network interfaces, or high-speed ADCs. The CPU sets up the DMA controller with the source address, destination address, and transfer size, then issues a command to start the transfer. During the transfer, the DMA controller takes over the system bus (via signals like HOLD/HLDA) and reads from and writes to memory directly. The CPU is free to perform other tasks or can be halted if the architecture requires. When the transfer finishes, the DMA controller usually triggers an interrupt to inform the CPU. DMA offloads repetitive data movement work from the CPU and is essential for high-bandwidth I/O.

352. PPI 8255 has internal bus of size

NEC model set
  1. Option A: 4 bit
  2. Option B: 8 bit
  3. Option C: 16 bit
  4. Option D: 32 bit
Show hint

The 8255 is an 8-bit peripheral device from the 1980s era. What is the standard bus width for such devices?

Show answer

Answer: B. 8 bit

The Intel 8255 Programmable Peripheral Interface has an internal 8-bit data bus. The 8255 is an important I/O controller used with 8-bit microprocessors like the 8085 and 8086. It features: (1) Three 8-bit ports (Port A, Port B, Port C), (2) Programmable control logic, (3) 8-bit internal data bus for communication with the CPU, (4) Various operating modes for input/output operations. The 8-bit bus width matches the data bus of the microprocessors of its era. Each port can transfer 8 bits of data. The internal bus width determines how much data can be transferred in one operation. Despite modern systems using wider buses, the 8255 remains important in embedded systems and industrial applications.

353. During a DMA transfer, the CPU is

NEC model set
  1. Option A: Completely shut down
  2. Option B: Actively involved in data transfer
  3. Option C: Bypassed or put on hold
  4. Option D: Reset
Show hint

DMA = Direct Memory Access. CPU is not involved in the transfer itself.

Show answer

Answer: C. Bypassed or put on hold

During a DMA transfer, the CPU is bypassed or put on hold. DMA mechanism: (1) Direct Memory Access - Data transfers without CPU involvement, (2) DMA controller takes control of bus, (3) CPU released for other tasks, (4) Improves I/O performance. How DMA works: (1) I/O device signals DMA controller - Data ready, (2) DMA requests bus from CPU, (3) CPU grants bus and enters hold state, (4) DMA transfers data between device and memory, (5) DMA signals completion, (6) CPU resumes. CPU states during DMA: (1) Completely shut down - No (CPU still runs internal circuits), (2) Hold/Idle - Stopped executing instructions, (3) Bypassed - Not involved in data transfer, (4) Not reset - Reset would lose state. Why DMA needed: (1) CPU too slow for I/O - DMA faster, (2) CPU efficiency - Can do other work, (3) Data throughput - Direct path, (4) Interrupt overhead - Reduces interrupts. DMA modes: (1) Burst mode - DMA holds bus for full transfer, (2) Cycle stealing - One byte at a time, stealing CPU cycles, (3) Transparent - Transfer during CPU idle time. Bus arbitration: (1) CPU and DMA controller share bus, (2) DMA has priority - Often, (3) CPU waits - Held state, (4) Bus multiplexing. CPU availability: (1) Can execute from cache - If data cached, (2) Can execute from internal memory, (3) Usually significant impact - Bus is shared, (4) Performance trade-off. Practical: (1) Modern CPUs - Multiple buses, reduced contention, (2) Caches reduce bus traffic, (3) I/O controller sophistication increases. This is fundamental to I/O architecture.

354. What is cache memory in a microprocessor?

  1. Option A: A type of secondary storage
  2. Option B: A type of RAM
  3. Option C: A type of memory that stores frequently accessed data
  4. Option D: A type of input/output device
Show answer

Answer: C. A type of memory that stores frequently accessed data

355. Which type of memory is used for long-term storage of data and programs even when the power is turned off?

  1. Option A: Primary Memory
  2. Option B: Secondary Memory
  3. Option C: Cache Memory
  4. Option D: Virtual Memory
Show answer

Answer: B. Secondary Memory

356. Which of the following is a type of non-volatile memory?

  1. Option A: Dynamic RAM (DRAM)
  2. Option B: Static RAM (SRAM)
  3. Option C: Flash Memory
  4. Option D: Synchronous DRAM (SDRAM)
Show answer

Answer: C. Flash Memory

357. Which type of memory is used as an extension of primary memory when there is not enough space to store all the necessary programs and data?

  1. Option A: Primary Memory
  2. Option B: Secondary Memory
  3. Option C: Cache Memory
  4. Option D: Virtual Memory
Show answer

Answer: D. Virtual Memory

358. Which type of memory has the fastest access time and is located closest to the CPU in the memory hierarchy?

  1. Option A: Primary Memory
  2. Option B: Secondary Memory
  3. Option C: Cache Memory
  4. Option D: Virtual Memory
Show answer

Answer: C. Cache Memory

359. Which of the following is a type of Double Data Rate (DDR) synchronous dynamic RAM (SDRAM)?

  1. Option A: DDR2 SDRAM
  2. Option B: DDR3 SDRAM
  3. Option C: DDR5 SDRAM
  4. Option D: All of the above
Show answer

Answer: D. All of the above

360. What is the main difference between primary and secondary memory?

  1. Option A: Primary memory is faster than secondary memory
  2. Option B: Secondary memory is faster than primary memory
  3. Option C: Primary memory is volatile while secondary memory is non-volatile
  4. Option D: Secondary memory is volatile while primary memory is non-volatile
Show answer

Answer: C. Primary memory is volatile while secondary memory is non-volatile

361. Which of the following is NOT a type of primary memory?

  1. Option A: ROM
  2. Option B: RAM
  3. Option C: Cache
  4. Option D: Hard Disk Drive
Show answer

Answer: D. Hard Disk Drive

362. Which of the following is NOT a type of secondary memory?

  1. Option A: Hard Disk Drive
  2. Option B: Solid State Drive
  3. Option C: USB Drive
  4. Option D: CPU Cache
Show answer

Answer: D. CPU Cache

363. Which memory device has the fastest access time in a microprocessor system?

  1. Option A: RAM
  2. Option B: ROM
  3. Option C: Cache
  4. Option D: Hard Disk Drive
Show answer

Answer: C. Cache

364. Which of the following is NOT a characteristic of volatile memory?

  1. Option A: It is faster than non-volatile memory
  2. Option B: It requires constant power to retain data
  3. Option C: It is used for long-term storage
  4. Option D: It is typically smaller in capacity than non-volatile memory
Show answer

Answer: C. It is used for long-term storage

365. Which of the following is NOT a characteristic of non-volatile memory?

  1. Option A: It retains data even when power is removed
  2. Option B: It is typically used for long-term storage
  3. Option C: It is slower than volatile memory
  4. Option D: It is larger in capacity than volatile memory
Show answer

Answer: D. It is larger in capacity than volatile memory

366. Which of the following is NOT a level of cache in a microprocessor system?

  1. Option A: L1
  2. Option B: L2
  3. Option C: L3
  4. Option D: L4
Show answer

Answer: D. L4

367. Which of the following is NOT a type of ROM?

  1. Option A: PROM
  2. Option B: EPROM
  3. Option C: EEPROM
  4. Option D: DRAM
Show answer

Answer: D. DRAM

368. What port is most pin-efficient communication method?

  1. Option A: Serial port
  2. Option B: Parallel port
  3. Option C: Peripheral port
  4. Option D: Memory port
Show hint

Uses fewer pins.

Show answer

Answer: A. Serial port

Serial port is most pin-efficient, requiring only 2-3 pins versus many for parallel.

2.6 Interrupt operations

56 questions · AExE0206

369. How many interrupts are there in the 8085 microprocessor?

Aasadh 2081 exam
  1. Option A: 5
  2. Option B: 8
  3. Option C: 10
  4. Option D: 13
Show hint

Count both maskable and non-maskable interrupts carefully.

Show answer

Answer: D. 13

The 8085 microprocessor has 13 total interrupts: 1 non-maskable (TRAP) and 12 maskable interrupts including RST 7.5, RST 6.5, RST 5.5, and others.

370. Which of the following is NOT a non-maskable interrupt in 8085?

Aasadh 2081 exam
  1. Option A: TRAP
  2. Option B: RST 7.5
  3. Option C: RST 6.5
  4. Option D: RST 5.5
Show hint

TRAP is non-maskable, but which one is the question asking about?

Show answer

Answer: A. TRAP

This is a tricky question. TRAP is the only non-maskable interrupt. RST 7.5, RST 6.5, and RST 5.5 are maskable interrupts that can be disabled.

371. Which one is a software interrupt in 8085?

Aasadh 2081 exam
  1. Option A: RST 0
  2. Option B: RST 6.5
  3. Option C: RST 7.5
  4. Option D: None of the above
Show hint

Software interrupts are generated by the program, not external hardware.

Show answer

Answer: A. RST 0

RST 0 through RST 7 are software interrupts generated by the program using RST instructions.

372. What is the highest priority interrupt in 8086?

Aasadh 2081 exam
  1. Option A: INTR
  2. Option B: NMI (Non-Maskable Interrupt)
  3. Option C: INT 0
  4. Option D: INT 3
Show hint

Which interrupt cannot be masked or disabled?

Show answer

Answer: B. NMI (Non-Maskable Interrupt)

NMI has the highest priority in 8086 because it cannot be masked and must be serviced immediately.

373. In the context of microprocessors, what is an interrupt?

  1. Option A: A polling loop that checks device status
  2. Option B: A signal that causes the CPU to temporarily suspend its current execution and jump to a service routine
  3. Option C: A power failure in the system
  4. Option D: A type of cache miss
Show hint

It is a hardware or software event that requests immediate attention.

Show answer

Answer: B. A signal that causes the CPU to temporarily suspend its current execution and jump to a service routine

An interrupt is an event, often signaled by hardware (like a timer, I/O device, or external pin), that forces the CPU to stop its current execution flow at a well-defined boundary and start executing an Interrupt Service Routine (ISR). Interrupts allow processors to respond quickly to external events without constant polling. When an interrupt is accepted, the CPU typically completes the current instruction, saves the current program counter and status on the stack, disables further interrupts if necessary, and then loads the ISR address (either from a fixed vector or via an interrupt controller). After servicing the event, the ISR executes a return-from-interrupt instruction, which restores the saved context and resumes the interrupted program as if nothing had happened.

374. What is an Interrupt Service Routine (ISR)?

  1. Option A: A special hardware register storing interrupt vectors
  2. Option B: The software routine executed in response to a specific interrupt
  3. Option C: A data structure listing I/O devices
  4. Option D: Another name for the main program
Show hint

It is like a callback function tied to an interrupt event.

Show answer

Answer: B. The software routine executed in response to a specific interrupt

An ISR is a piece of code that runs when a particular interrupt occurs. Its job is to handle the condition that triggered the interrupt, such as reading data from an I/O port, updating a counter, or clearing a hardware flag. The ISR runs with a special calling convention: the CPU saves sufficient context (at least the return address, sometimes additional registers) before jumping into it, and the ISR must finish by executing a specific return-from-interrupt instruction that restores the context. Good ISR design keeps the code as short and fast as possible, often deferring heavier work to the main program via flags or queues, to reduce interrupt latency and avoid blocking other interrupts for too long.

375. Which of the following correctly describes the typical interrupt processing sequence?

  1. Option A: CPU immediately stops mid-instruction and jumps to random memory
  2. Option B: CPU finishes current instruction, saves context, fetches ISR address, jumps to ISR, then restores context and resumes
  3. Option C: CPU ignores all interrupts while executing the main program
  4. Option D: CPU executes ISR in parallel on a different core
Show hint

Instructions are atomic; context must be preserved and restored.

Show answer

Answer: B. CPU finishes current instruction, saves context, fetches ISR address, jumps to ISR, then restores context and resumes

A well-behaved interrupt mechanism never breaks an instruction mid-execution. When an interrupt request is recognized, the CPU completes the current instruction, then saves the return address (and often the status flags and some registers) onto the stack. It then determines the appropriate ISR address, typically by indexing into an interrupt vector table, and sets the program counter to that address. After the ISR finishes, a special return-from-interrupt instruction causes the saved context (program counter and possibly flags/registers) to be restored so that execution continues exactly where it left off. This sequence ensures both correctness (no corrupted partial instructions) and transparency (the main program does not have to be explicitly aware of the interrupt timing).

376. What is the purpose of an interrupt vector table?

  1. Option A: To store configuration registers for devices
  2. Option B: To hold the starting addresses of all interrupt service routines
  3. Option C: To buffer incoming interrupts until the CPU is ready
  4. Option D: To log the history of interrupts
Show hint

It is like a lookup table that maps interrupt numbers to handler addresses.

Show answer

Answer: B. To hold the starting addresses of all interrupt service routines

An interrupt vector table is a region of memory where each entry corresponds to a particular interrupt source and contains the address of that interrupt’s service routine. When an interrupt occurs, the hardware or an interrupt controller generates an interrupt number, which the CPU uses to index into the table and fetch the ISR address. This design makes interrupt handling flexible: changing which routine runs for a given interrupt can be done by modifying the table entry, without changing CPU hardware. In some architectures, the vector table is at a fixed address in memory; in others, its base address can be relocated for more advanced operating system designs.

377. Interrupt Service Routine (ISR) executes

NEC model set
  1. Option A: Before execution of current instructions
  2. Option B: With pause of current instructions
  3. Option C: After execution of current instructions
  4. Option D: With execution of no instruction
Show hint

An interrupt doesn't interrupt mid-instruction. The processor finishes the current instruction first.

Show answer

Answer: C. After execution of current instructions

An Interrupt Service Routine (ISR) executes after the current instruction completes execution. When an interrupt occurs: (1) The processor finishes executing the current instruction, (2) The processor saves the current state (program counter and registers), (3) The processor jumps to the ISR address, (4) The ISR executes completely, (5) Upon returning from ISR, execution resumes from where it was interrupted. This ensures that instructions are atomic and not interrupted mid-execution, preventing data corruption. The processor cannot execute an ISR with a pause in the middle of an instruction as that would violate instruction atomicity. The phrase 'after execution of current instructions' acknowledges that the current instruction must complete before the ISR begins. Different ISR priorities may exist, with higher priority interrupts able to interrupt lower priority ISRs.

378. What is the purpose of the interrupt flag in microcontrollers?

NEC model set
  1. Option A: To indicate an interrupt request has occurred
  2. Option B: To disable all interrupts
  3. Option C: To reset the CPU
  4. Option D: To increase CPU speed
Show hint

Interrupt flags signal that an interrupt has been requested or is pending.

Show answer

Answer: A. To indicate an interrupt request has occurred

The purpose of the interrupt flag in microcontrollers is to indicate an interrupt request has occurred. Interrupt flags: (1) Set when interrupt event occurs, (2) Signal to CPU that interrupt pending, (3) Must be cleared after servicing, (4) Part of status register or interrupt register. How interrupt flag works: (1) Interrupt event occurs (external pin, timer, ADC), (2) Hardware sets corresponding flag, (3) CPU checks flags (if enabled), (4) CPU services interrupt, (5) ISR must clear flag (usually). Flag management: (1) Hardware sets - Automatic when event occurs, (2) Software clears - Done in ISR, (3) Must clear - If not, ISR called repeatedly. Interrupt enable vs flag: (1) Flag - Indicates interrupt occurred, (2) Enable - Controls whether CPU responds to flag, (3) Both needed - Flag set but CPU may not respond if disabled. Status register: (1) Contains multiple flags, (2) Interrupt flag - One of several, (3) Other flags - Zero flag, carry flag, etc., (4) Readable by software. Usage: (1) Check flag before servicing - Determine which interrupt, (2) In ISR - Identify which event triggered, (3) Priority - Multiple flags, handle by priority. Different from: (1) Disable all interrupts - Different mechanism (usually global enable), (2) Reset - Clears entire system state, (3) Speed increase - No relationship. Practical: (1) Single vs multiple flags - Depends on microcontroller, (2) Must manage carefully - Clear flags properly, (3) Polling alternative - Software can poll without flags. This is essential to interrupt handling.

379. INT 3 is used for what purpose?

Recalled from Jan 2026 exam
  1. Option A: Division-by-zero error
  2. Option B: Debugger breakpoint interrupt
  3. Option C: System call invocation
  4. Option D: Hardware interrupt
Show hint

This interrupt is commonly used in debugging software. What does INT 3 trigger?

Show answer

Answer: B. Debugger breakpoint interrupt

INT 3 is used for debugger breakpoint interrupt. This is a special x86 interrupt that signals a breakpoint to the debugger. When a debugger sets a breakpoint in code, it replaces the original instruction with INT 3 (opcode 0xCC). When execution reaches that point, INT 3 is triggered, causing a debugger exception that allows the debugger to pause execution and inspect program state. INT 3 is also known as the breakpoint interrupt. It's a 1-byte instruction making it ideal for inserting breakpoints without affecting code alignment.

380. What is the purpose of the Interrupt Controller in a microprocessor?

  1. Option A: To generate interrupts
  2. Option B: To handle interrupts
  3. Option C: To store interrupt vectors
  4. Option D: To communicate with external devices
Show answer

Answer: B. To handle interrupts

381. What is the purpose of the INT instruction in Assembly Language Programming?

  1. Option A: To perform an arithmetic operation
  2. Option B: To compare two values
  3. Option C: To generate a software interrupt
  4. Option D: To move data between registers
Show answer

Answer: C. To generate a software interrupt

382. What is an interrupt service routine (ISR) in a microprocessor?

  1. Option A: A software routine that responds to a specific interrupt
  2. Option B: A hardware circuit that triggers an interrupt
  3. Option C: A type of memory used for storing interrupt data
  4. Option D: A type of instruction that modifies the contents of a register
Show answer

Answer: A. A software routine that responds to a specific interrupt

383. Which of the following statements is true about the execution of an ISR?

  1. Option A: It always starts from the beginning of the program
  2. Option B: It always resumes from the point where the interrupted program left off
  3. Option C: It may start from the beginning or resume from the point where the interrupted program left off, depending on microprocessor architecture
  4. Option D: It never resumes from the point where the interrupted program left off
Show answer

Answer: C. It may start from the beginning or resume from the point where the interrupted program left off, depending on microprocessor architecture

384. What is the purpose of saving the context of the interrupted program in an ISR?

  1. Option A: To allow the ISR to modify the state of the interrupted program
  2. Option B: To resume execution of the interrupted program after the ISR is finished
  3. Option C: To allow the ISR to save data for future use
  4. Option D: To allow the ISR to execute faster
Show answer

Answer: B. To resume execution of the interrupted program after the ISR is finished

385. Which of the following statements is true about the priority of an ISR?

  1. Option A: The highest priority ISR is always executed first
  2. Option B: ISRs are executed in the order they are received
  3. Option C: The lowest priority ISR is always executed first
  4. Option D: ISRs are executed in the order of their priority
Show answer

Answer: A. The highest priority ISR is always executed first

386. Which of the following statements is true about re-entrant ISRs?

  1. Option A: They cannot be interrupted by other ISRs
  2. Option B: They can be interrupted by other ISRs
  3. Option C: They can only be called by other ISRs
  4. Option D: They can only be called by the main program
Show answer

Answer: B. They can be interrupted by other ISRs

387. What is the purpose of an exit routine in an ISR?

  1. Option A: To terminate the ISR
  2. Option B: To clear the interrupt flag
  3. Option C: To restore the context of the interrupted program
  4. Option D: To store data for future use
Show answer

Answer: C. To restore the context of the interrupted program

388. Which of the following statements is true about nested ISRs?

  1. Option A: They cannot occur in a microprocessor
  2. Option B: They occur when an ISR is triggered while another ISR is being serviced
  3. Option C: They occur when two ISRs are triggered simultaneously
  4. Option D: They occur when an ISR takes longer than expected to execute
Show answer

Answer: B. They occur when an ISR is triggered while another ISR is being serviced

389. Which of the following statements is true about the use of global variables in ISRs?

  1. Option A: Global variables should not be used in ISRs
  2. Option B: Global variables are safe to use in ISRs
  3. Option C: Global variables should only be used in re-entrant ISRs
  4. Option D: Global variables should only be used in high-priority ISRs
Show answer

Answer: A. Global variables should not be used in ISRs

390. What is the purpose of a spinlock in an ISR?

  1. Option A: To prevent other ISRs from executing while the current ISR is running
  2. Option B: To allow other ISRs to execute while the current ISR is running
  3. Option C: To synchronize access to shared resources
  4. Option D: To optimize the performance of the ISR
Show answer

Answer: C. To synchronize access to shared resources

391. What is an interrupt service routine (ISR)?

  1. Option A: A program that triggers an interrupt
  2. Option B: A program that executes when an interrupt is triggered
  3. Option C: A program that disables interrupts
  4. Option D: A program that clears interrupt flags
Show answer

Answer: B. A program that executes when an interrupt is triggered

392. Which of the following is not a common task performed by an ISR?

  1. Option A: Reading data from an I/O device
  2. Option B: Updating the interrupt enable flag
  3. Option C: Saving and restoring the processor state
  4. Option D: Clearing the interrupt flag
Show answer

Answer: B. Updating the interrupt enable flag

393. Which of the following statements is true about the stack in an ISR?

  1. Option A: The stack is not used in an ISR
  2. Option B: The stack is used to store data received from an I/O device
  3. Option C: The stack is used to store the return address and processor state
  4. Option D: The stack is used to store data that will be written to memory
Show answer

Answer: C. The stack is used to store the return address and processor state

394. What is the purpose of the return from interrupt (RTI) instruction?

  1. Option A: To return control to the ISR after an interrupt
  2. Option B: To return control to the main program after an interrupt
  3. Option C: To clear the interrupt flag
  4. Option D: To save the processor state and interrupt enable flag
Show answer

Answer: B. To return control to the main program after an interrupt

395. Which of the following is an example of a non-maskable interrupt (NMI)?

  1. Option A: Keyboard interrupt
  2. Option B: Timer interrupt
  3. Option C: Power failure interrupt
  4. Option D: DMA interrupt
Show answer

Answer: C. Power failure interrupt

396. Which of the following statements is true about nested interrupts?

  1. Option A: They are not allowed in most microprocessors
  2. Option B: They occur when an ISR triggers another interrupt
  3. Option C: They occur when multiple interrupts are triggered simultaneously
  4. Option D: They occur when an ISR takes too long to execute
Show answer

Answer: B. They occur when an ISR triggers another interrupt

397. What is the purpose of the interrupt enable flag in an ISR?

  1. Option A: To indicate that an interrupt has occurred
  2. Option B: To enable or disable interrupts
  3. Option C: To store the address of an ISR
  4. Option D: To clear the interrupt flag
Show answer

Answer: B. To enable or disable interrupts

398. What is interrupt processing in a microprocessor?

  1. Option A: The process of interrupting a running program
  2. Option B: The process of handling an interrupt request from an external device
  3. Option C: The process of prioritizing interrupts
  4. Option D: The process of executing the interrupt service routine
Show answer

Answer: B. The process of handling an interrupt request from an external device

399. Which of the following is a common method of handling multiple interrupts in a microprocessor?

  1. Option A: Polling
  2. Option B: Queuing
  3. Option C: Sorting
  4. Option D: Multiplexing
Show answer

Answer: A. Polling

400. What is the purpose of an interrupt vector in a microprocessor?

  1. Option A: To store the interrupt priority levels
  2. Option B: To store the addresses of the interrupt service routines
  3. Option C: To store the status of the interrupt flag
  4. Option D: To store the current program counter
Show answer

Answer: B. To store the addresses of the interrupt service routines

401. Which of the following statements is true about the interrupt priority levels in a microprocessor?

  1. Option A: Lower priority levels have higher priority
  2. Option B: Higher priority levels have higher priority
  3. Option C: The priority levels are not important in interrupt processing
  4. Option D: The priority levels are determined by the external devices
Show answer

Answer: B. Higher priority levels have higher priority

402. Which of the following is a disadvantage of using the polling method for interrupt processing?

  1. Option A: It is slower than other methods
  2. Option B: It requires more hardware resources
  3. Option C: It may cause a delay in responding to interrupts
  4. Option D: It may cause errors in the interrupt processing
Show answer

Answer: C. It may cause a delay in responding to interrupts

403. What is the purpose of the interrupt enable bit in a microprocessor?

  1. Option A: To enable the interrupt processing
  2. Option B: To disable the interrupt processing
  3. Option C: To enable the interrupt request from external devices
  4. Option D: To disable the interrupt request from external devices
Show answer

Answer: A. To enable the interrupt processing

404. Which of the following is an advantage of using the interrupt method for interrupt processing?

  1. Option A: It requires less hardware resources
  2. Option B: It is faster than other methods
  3. Option C: It does not cause a delay in responding to interrupts
  4. Option D: It does not require interrupt vectors
Show answer

Answer: C. It does not cause a delay in responding to interrupts

405. What is interrupt processing in a microprocessor?

  1. Option A: The process of generating interrupts
  2. Option B: The process of handling interrupts
  3. Option C: The process of disabling interrupts
  4. Option D: The process of prioritizing interrupts
Show answer

Answer: B. The process of handling interrupts

406. Which of the following statements is true about interrupt processing time?

  1. Option A: It is always shorter than the interrupt response time
  2. Option B: It is always longer than the interrupt response time
  3. Option C: It is equal to the interrupt response time
  4. Option D: It depends on the complexity of the interrupt handling routine
Show answer

Answer: D. It depends on the complexity of the interrupt handling routine

407. What is the purpose of an interrupt vector table?

  1. Option A: To store the priority of each interrupt
  2. Option B: To store the memory location of the interrupt service routine (ISR) for each interrupt
  3. Option C: To store the interrupt mask for each interrupt
  4. Option D: To store the status of each interrupt
Show answer

Answer: B. To store the memory location of the interrupt service routine (ISR) for each interrupt

408. Which of the following statements is true about interrupt latency?

  1. Option A: It is the time between the occurrence of an interrupt and the start of the ISR
  2. Option B: It is the time between the start of the ISR and the end of the ISR
  3. Option C: It is the time between the end of the ISR and the resumption of the interrupted program
  4. Option D: It is the time between the occurrence of an interrupt and the resumption of the interrupted program
Show answer

Answer: A. It is the time between the occurrence of an interrupt and the start of the ISR

409. Which of the following statements is true about interrupt nesting?

  1. Option A: It is the process of triggering multiple interrupts simultaneously
  2. Option B: It is the process of handling interrupts in the order they are received
  3. Option C: It is the process of disabling interrupts while an ISR is being executed
  4. Option D: It is the process of handling an interrupt while another ISR is being executed
Show answer

Answer: D. It is the process of handling an interrupt while another ISR is being executed

410. What is the purpose of an interrupt mask in a microprocessor?

  1. Option A: To enable or disable interrupts
  2. Option B: To prioritize interrupts
  3. Option C: To store the status of interrupts
  4. Option D: To store the memory location of ISRs
Show answer

Answer: A. To enable or disable interrupts

411. Which of the following statements is true about interrupt handling in a multitasking environment?

  1. Option A: Interrupts should be enabled while a task is executing
  2. Option B: Interrupts should be disabled while a task is executing
  3. Option C: Interrupts should be ignored in a multitasking environment
  4. Option D: Interrupts should be prioritized based on the task being executed
Show answer

Answer: A. Interrupts should be enabled while a task is executing

412. What is the purpose of an interrupt acknowledgment signal?

  1. Option A: To enable or disable an interrupt
  2. Option B: To acknowledge the occurrence of an interrupt
  3. Option C: To trigger an interrupt
  4. Option D: To prioritize interrupts
Show answer

Answer: B. To acknowledge the occurrence of an interrupt

413. Which of the following statements is true about edge-triggered interrupts?

  1. Option A: They are triggered by the presence of a signal for a specified period of time
  2. Option B: They are triggered by the rising or falling edge of a signal
  3. Option C: They are triggered by the amplitude of a signal
  4. Option D: They are triggered by the frequency of a signal
Show answer

Answer: B. They are triggered by the rising or falling edge of a signal

414. What is the purpose of an interrupt request (IRQ) line in a microprocessor?

  1. Option A: To trigger an interrupt
  2. Option B: To acknowledge an interrupt
  3. Option C: To prioritize interrupts
  4. Option D: To enable or disable interrupts
Show answer

Answer: A. To trigger an interrupt

415. What is the purpose of the interrupt acknowledge signal in a microprocessor?

  1. Option A: To request an interrupt from an external device
  2. Option B: To acknowledge receipt of an interrupt request from an external device
  3. Option C: To enable the interrupt processing
  4. Option D: To disable the interrupt processing
Show answer

Answer: B. To acknowledge receipt of an interrupt request from an external device

416. What is an interrupt vector table in a microprocessor?

  1. Option A: A table that stores the priority of each interrupt
  2. Option B: A table that stores the address of each ISR
  3. Option C: A table that stores the context of the interrupted program
  4. Option D: A table that stores the status of each interrupt flag
Show answer

Answer: B. A table that stores the address of each ISR

417. Which of the following statements is true about interrupt latency?

  1. Option A: It refers to the time required for an ISR to execute
  2. Option B: It refers to the time required for an interrupt to be detected and an ISR to be initiated
  3. Option C: It refers to the time required for the interrupted program to resume after an ISR is finished
  4. Option D: It refers to the time required for the microprocessor to switch between different ISRs
Show answer

Answer: B. It refers to the time required for an interrupt to be detected and an ISR to be initiated

418. Which of the following statements is true about nested interrupts?

  1. Option A: They occur when an ISR is triggered while another ISR is being serviced
  2. Option B: They occur when two ISRs are triggered simultaneously
  3. Option C: They occur when an ISR takes longer than expected to execute
  4. Option D: They never occur in a microprocessor
Show answer

Answer: A. They occur when an ISR is triggered while another ISR is being serviced

419. What is the purpose of an interrupt enable flag in a microprocessor?

  1. Option A: To disable all interrupts
  2. Option B: To enable all interrupts
  3. Option C: To enable specific interrupts
  4. Option D: To disable specific interrupts
Show answer

Answer: B. To enable all interrupts

420. What is the purpose of a maskable interrupt in a microprocessor?

  1. Option A: To disable all interrupts
  2. Option B: To enable all interrupts
  3. Option C: To enable specific interrupts
  4. Option D: To disable specific interrupts
Show answer

Answer: D. To disable specific interrupts

421. Which of the following statements is true about non-maskable interrupts?

  1. Option A: They can be disabled by software
  2. Option B: They can be disabled by hardware
  3. Option C: They can be ignored by the microprocessor
  4. Option D: They cannot be ignored by the microprocessor
Show answer

Answer: D. They cannot be ignored by the microprocessor

422. What is the purpose of an interrupt acknowledge signal in a microprocessor?

  1. Option A: To acknowledge the occurrence of an interrupt
  2. Option B: To acknowledge the receipt of an interrupt request
  3. Option C: To clear the interrupt enable flag
  4. Option D: To clear the interrupt flag
Show answer

Answer: B. To acknowledge the receipt of an interrupt request

423. Which of the following statements is true about edge-triggered interrupts?

  1. Option A: They are triggered by a change in the interrupt request signal
  2. Option B: They are triggered by the level of the interrupt request signal
  3. Option C: They are not used in microprocessors
  4. Option D: They are always maskable interrupts
Show answer

Answer: A. They are triggered by a change in the interrupt request signal

424. What is the purpose of a vectored interrupt in a microprocessor?

  1. Option A: To enable multiple interrupts to be serviced simultaneously
  2. Option B: To prioritize interrupts based on their importance
  3. Option C: To reduce interrupt latency
  4. Option D: To allow each interrupt to have a unique ISR address
Show answer

Answer: D. To allow each interrupt to have a unique ISR address

Questions from bibhushansaakha/MCQ (MIT License, © 2024 Bibhushan Saakha) and SamirWagle/NECPrep. Exact duplicates are shown once. Where the source’s answer is missing, repeated, or disagrees between copies, the question carries a note. Questions are sorted into the official NEC syllabus topics; a few that sit between two topics may be filed under either.