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FDNR to avoid inductors; 3rd order LPF at 4000 rad/s

Short answer

FDNR has impedance Z=1/(s²D). Bruton transformation converts inductors to resistors, grounded capacitors to FDNRs, removing inductors. For 3rd-order Butterworth at ω0=4000 rad/s, set terminating capacitors 100 nF: series resistors 2.5 kΩ; FDNR D=5×10⁻¹¹ F²Ω realized with GIC: C=100 nF, RD=5 kΩ. Add large DC bias resistors.

What is FDNR? How can you use FDNR to avoid the inductor in filter design? Explain. Design third order Butterworth low pass filter having half power frequency 4000 rad/s using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]

FDNR

A frequency dependent negative resistor (FDNR) is a one-port with impedance Z(s)=1s2DZ(s) = \dfrac{1}{s^2D}. At s=jωs = j\omega, Z=−1ω2DZ = -\dfrac{1}{\omega^2 D}: a real, negative resistance whose size falls as 1/ω21/\omega^2. DD (unit F²Ω) is its constant. It cannot be made from passive elements; a GIC with two capacitors realises it.

Using FDNR to avoid inductors

Bruton transformation: divide every impedance of the RLC ladder by ss (more generally by ksks). A voltage transfer function is a ratio of impedances, so it does not change:

ElementImpedanceAfter dividing by ssNew element
Resistor RRRRR/sR/scapacitor C=1/RC = 1/R
Inductor LLsLsLLLresistor R=LR = L
Capacitor CC1/sC1/sC1/(s2C)1/(s^2C)FDNR D=CD = C

In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.

The FDNR itself is an Antoniou GIC (two op-amps, five impedances Z1Z_1 to Z5Z_5 in a chain with Z5Z_5 grounded, so that Zin=Z1Z3Z5/(Z2Z4)Z_{in} = Z_1Z_3Z_5/(Z_2Z_4)). Put capacitors in positions 1 and 5 (Z1=1/sC1Z_1 = 1/sC_1, Z5=1/sC5Z_5 = 1/sC_5) and resistors in 2, 3, 4:

Zin=R3s2C1C5R2R4=1s2D,D=C1C5R2R4R3Z_{in} = \frac{R_3}{s^2 C_1 C_5 R_2 R_4} = \frac{1}{s^2 D}, \qquad D = \frac{C_1 C_5 R_2 R_4}{R_3}

With C1=C5=CC_1 = C_5 = C and R2=R3=R4=RR_2 = R_3 = R_4 = R: D=C2RD = C^2 R. At s=jωs = j\omega, Zin=−1/(ω2D)Z_{in} = -1/(\omega^2 D), a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).

Design: 3rd-order Butterworth LPF, ω0\omega_0 = 4000 rad/s

From the table (n = 3): Rs=1 ΩR_s = 1\ \Omega, L1=1L_1 = 1 H (series), C2=2C_2 = 2 F (shunt), L3=1L_3 = 1 H (series), RL=1 ΩR_L = 1\ \Omega.

Step 1: Bruton transformation (divide all impedances by ss): source and load resistors (1 Ω) become 1 F capacitors, each inductor LL becomes a resistor of LL Ω, each shunt capacitor CC becomes a grounded FDNR with D=CD = C.

Step 2: Scaling. Frequency scaling factor ω0=4000 rad/s\omega_0 = 4000\ \text{rad/s}. Choose the terminating capacitors as CtC_t = 100 nF, so

kz=1ω0Ct=14000×1×10−7=2500 Ωk_z = \frac{1}{\omega_0 C_t} = \frac{1}{4000 \times 1 \times 10^{-7}} = 2500\ \Omega Rnew=kzR,Cnew=Ckz ω0,Dnew=Dkz ω02\begin{aligned} R_{new} &= k_z R, \qquad C_{new} = \frac{C}{k_z\,\omega_0}, \qquad D_{new} = \frac{D}{k_z\,\omega_0^2} \end{aligned}

Step 3: Element values. Each FDNR is a GIC with C1=C5=CC_1 = C_5 = C and R2=R3=R4=RDR_2 = R_3 = R_4 = R_D, so D=C2RDD = C^2R_D. Taking C=CtC = C_t gives RD=Dnew/Ct2=kzDR_D = D_{new}/C_t^2 = k_z D.

PrototypeAfter BrutonScaledFinal element
Rs=1 ΩR_s = 1\ \OmegaCs=1C_s = 1 F1/(kzω0)1/(k_z\omega_0)100 nF
L1=1L_1 = 1 H (series)R1=1 ΩR_1 = 1\ \OmegaR1=1×2500R_1 = 1 \times 25002.5 kΩ
C2=2C_2 = 2 F (shunt)FDNR D2=2D_2 = 2D2=2/(kzω02)=5×10−11D_2 = 2/(k_z\omega_0^2) = 5 \times 10^{-11}GIC: C = 100 nF, RDR_D = 5 kΩ
L3=1L_3 = 1 H (series)R3=1 ΩR_3 = 1\ \OmegaR3=1×2500R_3 = 1 \times 25002.5 kΩ
RL=1 ΩR_L = 1\ \OmegaCL=1C_L = 1 F1/(kzω0)1/(k_z\omega_0)100 nF

Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put RaR_a across the source capacitor and RbR_b across the load capacitor. They must be much larger than kzk_z (the capacitor impedance at ω0\omega_0). At DC the FDNRs are open, so the DC gain is Rb/(Ra+ΣR+Rb)R_b/(R_a + \Sigma R + R_b). To keep the prototype DC gain of 1/2, set Rb=Ra+ΣRR_b = R_a + \Sigma R:

RaR_a = 100 kΩ, ΣR\Sigma R = 5 kΩ, so RbR_b = 105 kΩ.

Final circuit (Cs∥RaC_s \| R_a in series from the source, CL∥RbC_L \| R_b as the load, each DkD_k a GIC FDNR to ground):

Vi o--[Cs||Ra]--[R1]-+----[R3]-+----o Vo
                     |         |
                    [D2]    [CL||Rb]
GND ------------------------------------

Answer: terminating capacitors 0.1 μF; R1=R3R_1 = R_3 = 2.5 kΩ; FDNR D2D_2 = GIC with C = 0.1 μF and RDR_D = 5 kΩ; RaR_a = 100 kΩ, RbR_b = 105 kΩ.

✓ Answer checked by Claude Sonnet 5.5

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