- Asked 5/26
- 2079 Bhadra · 3+5 marks
Bruton transformation; FDNR 4th order LPF at 20,000 rad/s
Short answer
Bruton transformation divides each impedance by s, converting resistors to capacitors, inductors to resistors, and capacitors to FDNRs. For 4th-order LPF at 20000 rad/s: terminal C=10 nF, series R=3.827 kΩ and 9.24 kΩ, GIC FDNR with C=10 nF, RD=9.24 kΩ and 3.827 kΩ; bias resistors 100 kΩ and 113.1 kΩ for DC path.
What is Bruton transformation? Design the 4th order Butterworth low pass filter with half power frequency 20,000 rad/s and practically realizable elements using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
Bruton transformation
Bruton transformation: divide every impedance of the RLC ladder by (more generally by ). A voltage transfer function is a ratio of impedances, so it does not change:
| Element | Impedance | After dividing by | New element |
|---|---|---|---|
| Resistor | capacitor | ||
| Inductor | resistor | ||
| Capacitor | FDNR |
In a lowpass ladder the inductors are in the series arms (often floating) and the capacitors are shunt (grounded). After the transformation the inductors become plain resistors and the grounded capacitors become grounded FDNRs, which one GIC can realise. So no inductor is left.
Design: 4th-order Butterworth LPF, = 20,000 rad/s
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (T-ladder: series L first, shunt C to ground).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 3.827 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 9.24 kΩ | |
| H (series) | 9.24 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 3.827 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 13.07 kΩ, so = 113.1 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Building each FDNR with a GIC
In the Antoniou GIC, . Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Answer: source and load capacitors 10 nF; series resistors 3.827 kΩ and 9.24 kΩ; FDNRs (GIC with C = 10 nF, = 9.24 kΩ) and (C = 10 nF, = 3.827 kΩ); = 100 kΩ, = 113.1 kΩ.
✓ Answer checked by Claude Sonnet 5.5
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