- Asked 5/26
- 2079 Baisakh · 5 marks
FDNR 4th order Butterworth LPF at 16,000 rad/s
Short answer
Bruton transform the 4th-order Butterworth prototype (Rs=1, L1=0.7654, C2=1.848, L3=1.848, C4=0.7654, RL=1) and scale to 16000 rad/s with Ct=10 nF (kz=6250 Ω). Series resistors: 4.784 kΩ and 11.55 kΩ. FDNRs: D2=1.848 (GIC: C=10 nF, RD=11.55 kΩ), D4=0.7654 (GIC: C=10 nF, RD=4.784 kΩ). DC bias: Ra=100 kΩ, Rb=116.3 kΩ.
Design a fourth order Butterworth low pass filter having half power frequency of 16000 rad/s using FDNR. [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
The inductors of the doubly terminated ladder are removed with the Bruton transformation, and the shunt capacitors become grounded FDNRs () made with GICs.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (series L first, shunt C to ground).
FDNR from a GIC. Each FDNR is made with an Antoniou GIC (two op-amps, five impedances to in a chain with grounded, so that ). Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 10 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 10 nF | ||
| H (series) | 4.784 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 11.55 kΩ | |
| H (series) | 11.55 kΩ | ||
| F (shunt) | FDNR | GIC: C = 10 nF, = 4.784 kΩ | |
| F | 10 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 16.33 kΩ, so = 116.3 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Answer: terminating capacitors 10 nF; series resistors 4.784 kΩ and 11.55 kΩ; FDNRs: = GIC (C = 10 nF, = 11.55 kΩ), = GIC (C = 10 nF, = 4.784 kΩ); = 100 kΩ, = 116.3 kΩ.
✓ Answer checked by Claude Sonnet 5.5
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