- Asked 3/26
- 2072 Chaitra · 6 marks
FDNR 4th order Butterworth LPF at 4000 rad/s
Short answer
Bruton transform the4th-order Butterworth prototype (Rs=1, L1=0.7654, C2=1.848, L3=1.848, C4=0.7654, RL=1) and scale to4000 rad/s with Ct=100 nF (kz=2500 Ω). Series resistors1.914 kΩ and4.62 kΩ. FDNRs: D2=1.848 (GIC: C=100 nF, RD=4.62 kΩ), D4=0.7654 (GIC: C=100 nF, RD=1.914 kΩ). DC bias: Ra=100 kΩ, Rb=106.5 kΩ.
Design a Fourth order Butterworth low pass filter having half power frequency of 4000 rad/s using Frequency dependent negative resistor (FDNR). [Table: doubly terminated Butterworth element values normalized to 1 rad/s, 1 Ω terminations: n = 2: 1.414, 1.414; n = 3: 1, 2, 1; n = 4: 0.7654, 1.848, 1.848, 0.7654; n = 5: 0.618, 1.618, 2, 1.618, 0.618]
The design uses the Bruton transformation to remove the inductors of the doubly terminated Butterworth ladder; the shunt capacitors become grounded FDNRs (), each realised with a GIC.
From the table (n = 4), the doubly terminated Butterworth prototype (1 Ω terminations, rad/s) is , H, F, H, F, (series L first, shunt C to ground).
FDNR from a GIC. Each FDNR is made with an Antoniou GIC (two op-amps, five impedances to in a chain with grounded, so that ). Put capacitors in positions 1 and 5 (, ) and resistors in 2, 3, 4:
With and : . At , , a negative resistance whose value depends on frequency: an FDNR (also called a D-element or supercapacitor).
Step 1: Bruton transformation (divide all impedances by ): source and load resistors (1 Ω) become 1 F capacitors, each inductor becomes a resistor of Ω, each shunt capacitor becomes a grounded FDNR with .
Step 2: Scaling. Frequency scaling factor . Choose the terminating capacitors as = 100 nF, so
Step 3: Element values. Each FDNR is a GIC with and , so . Taking gives .
| Prototype | After Bruton | Scaled | Final element |
|---|---|---|---|
| F | 100 nF | ||
| H (series) | 1.914 kΩ | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 4.62 kΩ | |
| H (series) | 4.62 kΩ | ||
| F (shunt) | FDNR | GIC: C = 100 nF, = 1.914 kΩ | |
| F | 100 nF |
Step 4: DC path. The source and load capacitors block DC, and the op-amps in the GICs need a DC bias path. Put across the source capacitor and across the load capacitor. They must be much larger than (the capacitor impedance at ). At DC the FDNRs are open, so the DC gain is . To keep the prototype DC gain of 1/2, set :
= 100 kΩ, = 6.534 kΩ, so = 106.5 kΩ.
Final circuit ( in series from the source, as the load, each a GIC FDNR to ground):
Vi o--[Cs||Ra]--[R1]-+----[R3]-+-------+----o Vo
| | |
[D2] [D4] [CL||Rb]
GND --------------------------------------------
Answer: terminating capacitors 0.1 μF; series resistors 1.914 kΩ and 4.62 kΩ; FDNRs: = GIC (C = 0.1 μF, = 4.62 kΩ), = GIC (C = 0.1 μF, = 1.914 kΩ); = 100 kΩ, = 106.5 kΩ.
✓ Answer checked by Claude Sonnet 5.5
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