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Digital exchange principles; non-blocking 3-stage

Short answer

Digital exchanges use 64 kbps PCM (E1 frames), time-slot interchange, stored program control, and BORSCHT interfaces. A three-stage non-blocking switch requires k ≥ 2n-1 (Clos); with n=√(N/2) crosspoints minimize; for N=128, 7680 crosspoints.

What are principles of digital exchange? Describe non blocking switches with 3 stages switching matrix.

Principles of a digital exchange

  1. Digital (PCM) representation: speech is sampled at 8 kHz, quantised and coded into 8 bits (64 kbps per channel). 32 channels form a 2.048 Mbps E1 frame of 125 µs.
  2. Time division switching: switching hardware is shared in time. Time switches (TSIs) change the time slot of a sample; space switches change the highway. They are combined as TST, STS, TSST, etc.
  3. Stored program control: a processor runs software for call processing, routing, charging and maintenance.
  4. Line interface (BORSCHT): battery feed, over-voltage protection, ringing, supervision, coding, hybrid and testing for each analogue line.
  5. Digital trunks and CCS: inter-exchange trunks are PCM links, and signaling is usually SS7.
  6. Synchronisation: all exchanges work on a common clock to avoid slips.
 lines-->[Line units]-->[ T-S-T network ]-->[Trunks]
                ^              ^              ^
                +------[ SPC processor ]------+

Non-blocking switch with a three-stage matrix

A single N×NN \times N matrix is non-blocking but needs N2N^2 crosspoints. A three-stage network uses fewer.

Structure: NN inputs in groups of nn:

  • Stage 1: N/nN/n arrays of n×kn \times k
  • Stage 2: kk arrays of (N/n)×(N/n)(N/n) \times (N/n)
  • Stage 3: N/nN/n arrays of k×nk \times n
 n in [n x k] \               / [k x n] n out
 n in [n x k] --> k arrays  --> [k x n] n out
  ...         /  (N/n x N/n)  \    ...
Nx=2Nk+k(Nn)2N_x = 2Nk + k\left(\frac{N}{n}\right)^2

Clos condition for strict non-blocking: a new call from input array A to output array B is worst-hit when the other n−1n-1 inputs of A use n−1n-1 middle arrays and the other n−1n-1 outputs of B use n−1n-1 different middle arrays. One more is needed:

k≥2(n−1)+1=2n−1k \ge 2(n - 1) + 1 = 2n - 1

Minimum crosspoints: with k=2n−1k = 2n - 1, NxN_x is minimum at n=N/2n = \sqrt{N/2}, giving

Nx,min=4N(2N−1)N_{x,min} = 4N\left(\sqrt{2N} - 1\right)

Example: N=128N = 128: n=8n = 8, k=15k = 15, N/n=16N/n = 16:

Nx=2(128)(15)+15(16)2=3840+3840=7680N_x = 2(128)(15) + 15(16)^2 = 3840 + 3840 = 7680

A single-stage switch would need 1282=16 384128^2 = 16\,384 crosspoints.

Digital equivalent: in a TST switch the internal time slots act like middle arrays, so it is non-blocking when l≥2c−1l \ge 2c - 1 (e.g. c=32c = 32, l=63l = 63, so 64 internal slots are used).

✓ Answer checked by Claude Opus 5.5 (high effort)

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