Seven-segment "a" segment using NOR gates

Segment a of a BCD-to-seven-segment decoder is ON for digits 0, 2, 3, 5, 6, 7, 8, 9 and OFF only for 1 and 4. Inputs 10–15 are don't-cares.

$$a = \Sigma m(0,2,3,5,6,7,8,9) + d(10\text{–}15)$$

Simplest SOP and its circuit

Groups: rows 11, 10 give $A$; columns 11, 10 give $C$; cells 5, 7, 13, 15 give $BD$; corners 0, 2, 8, 10 give $B'D'$.

$$a = A + C + BD + B'D' = A + C + (B \odot D)$$

 B --+-[AND]--------+
 D --+              |
 B'--+-[AND]--------+--[OR 4]--- a
 D'--+              |
 A -----------------+
 C -----------------+

Realization using only NOR gates

NOR-NOR logic directly implements a product-of-sums. Take the 0s of the map (cells 1 and 4) with don't-cares:

• Cell 1 ($0001$): cannot combine with 9 (9 is a 1), so the maxterm is $(A + B + C + D')$.
• Cell 4 ($0100$) combines with don't-care 12: $(B' + C + D)$.

$$a = (A + B + C + D')(B' + C + D)$$

Using De Morgan's theorem:

$$a = \overline{\overline{(A + B + C + D')} + \overline{(B' + C + D)}}$$

So: two first-level NORs form the complemented sums, a second-level NOR combines them, and the complemented inputs $B'$ and $D'$ are made with NOR gates used as inverters (both inputs tied together).

 B --[NOR]-- B'      D --[NOR]-- D'
 A  --+
 B  --+--[NOR 4]--N1--+
 C  --+               |
 D' --+               +--[NOR 2]--- a
 B' --+               |
 C  --+--[NOR 3]--N2--+
 D  --+

Total: 2 NOR inverters + one 4-input NOR + one 3-input NOR + one 2-input NOR = 5 NOR gates.

Check: digit 1 ($0001$): $N_1 = \overline{0+0+0+0} = 1$, so $a = 0$. Digit 4 ($0100$): $N_2 = 1$, so $a = 0$. Digit 9 ($1001$): $N_1 = 0$, $N_2 = \overline{1+0+1} = 0$, so $a = 1$. Correct.