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3-bit magnitude comparator

Short answer

Comparison starts at MSB. Equality of bit pairs gives xi = Ai XNOR Bi. (A=B) = x2·x1·x0. (A>B) = A2·B2' + x2·A1·B1' + x2·x1·A0·B0'. (A<B) is the dual: A2'·B2 + x2·A1'·B1 + x2·x1·A0'·B0.

Explain the operation of 3 bit magnitude comparator with truth table and draw the circuit.

A magnitude comparator compares two binary numbers and indicates whether A>BA>B, A=BA=B or A<BA<B. A 3-bit comparator compares A=A2A1A0A = A_2A_1A_0 with B=B2B1B0B = B_2B_1B_0 (6 inputs, 64 combinations, 3 outputs).

Operation

Comparison starts at the most significant bit:

  1. If A2≠B2A_2 \ne B_2, the result is decided: A2=1,B2=0A_2 = 1, B_2 = 0 gives A>BA>B; A2=0,B2=1A_2 = 0, B_2 = 1 gives A<BA<B.
  2. If A2=B2A_2 = B_2, compare A1A_1 and B1B_1 in the same way.
  3. If A2=B2A_2 = B_2 and A1=B1A_1 = B_1, compare A0A_0 and B0B_0.
  4. If all three pairs are equal, A=BA = B.

Bit equality is detected by X-NOR gates:

xi=AiBi+Ai‾ Bi‾,i=0,1,2x_i = A_iB_i + \overline{A_i}\,\overline{B_i}, \quad i = 0, 1, 2

Truth table (condensed)

The full table has 64 rows; it is written compactly by bit priority (X = any value):

A2A_2 vs B2B_2A1A_1 vs B1B_1A0A_0 vs B0B_0A>BA>BA=BA=BA<BA<B
A2>B2A_2>B_2 (1,0)XX100
A2<B2A_2<B_2 (0,1)XX001
A2=B2A_2=B_2A1>B1A_1>B_1X100
A2=B2A_2=B_2A1<B1A_1<B_1X001
A2=B2A_2=B_2A1=B1A_1=B_1A0>B0A_0>B_0100
A2=B2A_2=B_2A1=B1A_1=B_1A0<B0A_0<B_0001
A2=B2A_2=B_2A1=B1A_1=B_1A0=B0A_0=B_0010

Sample rows: A=101,B=011A=101, B=011 gives A>BA>B (decided at A2A_2); A=110,B=111A=110, B=111 gives A<BA<B (decided at A0A_0); A=B=010A=B=010 gives A=BA=B.

Output expressions

(A=B)=x2x1x0(A>B)=A2B2‾+x2A1B1‾+x2x1A0B0‾(A<B)=A2‾B2+x2A1‾B1+x2x1A0‾B0\begin{aligned} (A=B) &= x_2x_1x_0 \\ (A>B) &= A_2\overline{B_2} + x_2A_1\overline{B_1} + x_2x_1A_0\overline{B_0} \\ (A<B) &= \overline{A_2}B_2 + x_2\overline{A_1}B_1 + x_2x_1\overline{A_0}B_0 \end{aligned}

Circuit

A2,B2 ─[XNOR]─ x2     A1,B1 ─[XNOR]─ x1
A0,B0 ─[XNOR]─ x0

x2, x1, x0 ──────────[AND]──────────── A=B

A2, B2' ─────────[AND]──┐
x2, A1, B1' ─────[AND]──┼─[OR]──────── A>B
x2, x1, A0, B0' ─[AND]──┘

A2', B2 ─────────[AND]──┐
x2, A1', B1 ─────[AND]──┼─[OR]──────── A<B
x2, x1, A0', B0 ─[AND]──┘

Gates: 3 X-NOR, 7 AND, 2 OR (plus inverters for the complemented bits). The A<BA<B output can also be obtained as (A>B)+(A=B)‾\overline{(A>B) + (A=B)} using one NOR gate.

✓ Answer checked by Claude Opus 5.5 (high effort)

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