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2-bit magnitude comparator
Short answer
A 2-bit magnitude comparator compares A=A1A0 and B=B1B0. Outputs: A>B, A=B, A<B. Equality of each bit pair is given by XNOR: xi = AiBi + Ai'Bi'. A=B = x1 x0; A>B = A1 B1' + x1 A0 B0'; A<B = A1' B1 + x1 A0' B0. Only one output is active. Circuit uses XNORs, ANDs, and ORs.
Explain the operation of two bit magnitude comparator with truth table and circuit diagram.
A magnitude comparator is a combinational circuit that compares two binary numbers A and B and gives three outputs: , and . Exactly one output is 1 at a time.
A 2-bit comparator compares with (4 inputs, 3 outputs).
Operation
- Compare the most significant bits first. If and , then ; if and , then .
- Only if are the LSBs , compared in the same way.
- only when both bit pairs are equal.
Equality of bit is given by an X-NOR gate:
Truth table
| 0 0 | 0 0 | 0 | 1 | 0 |
| 0 0 | 0 1 | 0 | 0 | 1 |
| 0 0 | 1 0 | 0 | 0 | 1 |
| 0 0 | 1 1 | 0 | 0 | 1 |
| 0 1 | 0 0 | 1 | 0 | 0 |
| 0 1 | 0 1 | 0 | 1 | 0 |
| 0 1 | 1 0 | 0 | 0 | 1 |
| 0 1 | 1 1 | 0 | 0 | 1 |
| 1 0 | 0 0 | 1 | 0 | 0 |
| 1 0 | 0 1 | 1 | 0 | 0 |
| 1 0 | 1 0 | 0 | 1 | 0 |
| 1 0 | 1 1 | 0 | 0 | 1 |
| 1 1 | 0 0 | 1 | 0 | 0 |
| 1 1 | 0 1 | 1 | 0 | 0 |
| 1 1 | 1 0 | 1 | 0 | 0 |
| 1 1 | 1 1 | 0 | 1 | 0 |
Output expressions
(The same results come from 4-variable K-maps of the table, e.g. .)
Circuit diagram
A1,B1 ─[XNOR]── x1 A0,B0 ─[XNOR]── x0
x1, x0 ───────────[AND]────────────── A=B
A1, B1' ──────────[AND]──┐
├─[OR]────── A>B
x1, A0, B0' ──────[AND]──┘
A1', B1 ──────────[AND]──┐
├─[OR]────── A<B
x1, A0', B0 ──────[AND]──┘
Gates: 2 X-NOR gates for , ; one AND for ; two ANDs and an OR for each of and (inverters give the complemented bits).
Example: , : so ; , so , and the other outputs are 0.
✓ Answer checked by Claude Opus 5.5 (high effort)
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