PLA for F1 = Σm(3,5,6,7), F2 = Σm(0,2,4,7)

A PLA (Programmable Logic Array) has a programmable AND array that forms product terms and a programmable OR array that sums them into outputs. To use it efficiently, each function is minimized and product terms are shared where possible.

Simplification

$F_1 = \Sigma m(3,5,6,7)$:

$$F_1 = AB + AC + BC$$

$F_2 = \Sigma m(0,2,4,7)$:

Groups: (0, 2) gives $A'C'$; (0, 4) gives $B'C'$; 7 alone gives $ABC$.

$$F_2 = A'C' + B'C' + ABC$$

PLA programming table

Six product terms are needed (none is common to both functions). In the input columns 1 = true variable, 0 = complemented, – = not connected; in the output columns 1 = term connected to that OR gate.

Size: 3 inputs × 6 product terms × 2 outputs.

PLA diagram

 A  A' B  B' C  C'        (input buffers)
 |  |  |  |  |  |
 x--+--x--+--+--+--[AND]-- P1 = AB
 x--+--+--+--x--+--[AND]-- P2 = AC
 +--+--x--+--x--+--[AND]-- P3 = BC
 +--x--+--+--+--x--[AND]-- P4 = A'C'
 +--+--+--x--+--x--[AND]-- P5 = B'C'
 x--+--x--+--x--+--[AND]-- P6 = ABC
            OR array
 P1, P2, P3 ----------[OR]--> F1
 P4, P5, P6 ----------[OR]--> F2
 (x = programmed connection)

Check: $ABC = 110$ (6): $P_1 = 1$, so $F_1 = 1$; $P_4 = P_5 = P_6 = 0$, so $F_2 = 0$. Both match the given minterm lists for all 8 inputs.