Count up/down and tracking type ADC

A tracking (servo or up/down counter) ADC is an improved counter-type ADC. It uses an up/down counter in place of the up counter, so the DAC output follows (tracks) the input continuously. It does not restart from zero for each conversion.

Block diagram

 Vin -------------------(+)\
                            >-- comparator --+
        +-------------- (-)/                 | U/D
        |                                    v
        |     +------------------------------+
        |     |  n-bit UP/DOWN COUNTER       |<-CLOCK
        |     +------------------------------+
        |                  | D(n-1)..D0
        |                  +------------> digital output
        |                  v
        +--------- [ n-bit DAC ]
                     V_DAC

Working

1. The comparator compares Vin with the DAC output V_DAC.
2. If Vin > V_DAC: the comparator output is HIGH, the counter is set to count up, and V_DAC rises one step per clock.
3. If Vin < V_DAC: the comparator output is LOW, the counter counts down, and V_DAC falls one step per clock.
4. At the first conversion the counter climbs from zero like a simple counter ADC. After that, the counter only changes by the amount Vin has changed, so the next conversion takes just a few clock pulses.
5. When V_DAC reaches Vin, the output toggles up and down by ±1 LSB around the correct value. This is the steady-state "bit bobble". The counter contents give the digital value of Vin at any instant.

 V
 |                    Vin
 |          ...............................
 |                _   _   _   _   _
 |              _| |_| |_| |_| |_| |_
 |            _|
 |          _|          V_DAC toggles ±1 LSB
 |        _|            about Vin once locked
 |      _|
 |    _|   V_DAC climbs 1 LSB per clock
 |  _|
 +--------------------------------------- t
    first lock          tracking

Features

• Fast for slowly varying signals: the conversion time after locking is a few clocks, not up to 2ⁿ.
• Continuous output, with no START pulse needed each time.
• Limitation: if Vin changes faster than 1 LSB per clock (slew limit = LSB × fclk), the counter cannot follow and the output lags.
• The ±1 LSB toggling at steady state needs a latch or display hold.
• Uses: tracking slowly changing signals in control systems, servo systems and data loggers.

Comparison with simple count-up ADC