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Dual slope ADC; why quad slope is more accurate

Short answer

Dual-slope ADC integrates Vin for fixed time T1, then de-integrates using −Vref until zero crossing; T2 ∝ Vin, cancelling R,C,clock drift. Quad-slope adds an auto-zero cycle that measures and subtracts offset errors, improving accuracy especially for small inputs.

Explain the working principle of dual slope integrating type ADC with necessary diagrams. Why is the output of quad slope ADC more accurate than that of dual slope ADC?

A dual slope integrating ADC integrates the input for a fixed time T1, then integrates a reference of opposite polarity until the output returns to zero. The time T2 taken for this is measured by a counter and is proportional to the input.

Block diagram

 Vin  --o S1                 C
 -Vref--o--+--[R]--+--------||--------+
                   |                  |
                  (-)\                |
                      >---------------+--Vo1-->[COMPARATOR]
                  (+)/                              |
                   |                                v
                  GND        CLOCK-->[COUNTER]<-->[CONTROL]
                                        |
                                   digital out

Working

  1. Reset: the counter is cleared and the integrator capacitor is shorted.
  2. Run-up (T1 fixed): S1 connects Vin. The integrator output becomes Vo1 = −Vin·T1/RC. T1 = 2ⁿ clock pulses, and the counter overflows at the end of T1.
  3. Run-down (T2 variable): S1 connects −Vref. The output returns to zero at a fixed slope Vref/RC while the counter counts from zero.
  4. End: the comparator detects zero crossing and stops the counter.
Vin·T1/RC = Vref·T2/RC
N2 = N1 · Vin/Vref

  Vo1
   |     /\      <- high Vin
   |    /  \
   |   / /\ \    <- low Vin (same down slope)
   |__/_/__\_\_____ t
      |<-T1->|T2a|
             |<-T2b->|

R, C and clock drift cancel out, and noise (including mains hum) is averaged out. It is accurate but slow, and it is used in DMMs.

Why quad slope is more accurate than dual slope

A dual slope ADC still has errors that do not cancel: integrator op-amp offset voltage, input bias current, comparator offset and delay, and switch leakage. These add a fixed error, especially near zero input.

A quad slope ADC adds a calibration (auto-zero) cycle:

  • Slopes 1 and 2: the input is grounded (Vin = 0). The converter integrates and de-integrates, and the count obtained measures only the offset errors.
  • Slopes 3 and 4: the normal dual slope conversion of Vin, which includes the same errors.
  • The control logic subtracts the first count from the second, so the offset and bias errors cancel.

The result depends only on Vin/Vref, so the quad slope ADC gives better accuracy, especially for small inputs, at the cost of a longer conversion time.

✓ Answer checked by Claude Opus 5.5 (high effort)

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