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RIM instruction in 8085

Short answer

RIM (opcode 20H) loads accumulator with interrupt mask status, pending interrupts (I7.5–I5.5), IE flag, and SID input. Used to read serial data and poll mask/pending conditions without affecting flags.

Describe the operation of interrupt instruction RIM in 8085 microprocessor.

RIM (Read Interrupt Mask) is a 1-byte instruction (opcode 20H, 4 T-states). It loads the accumulator with the status of the interrupt masks, the pending interrupts, the interrupt enable flip-flop and the serial input data. It affects no flags.

Accumulator format after RIM

D7D6D5D4D3D2D1D0
SIDI7.5I6.5I5.5IEM7.5M6.5M5.5
  • SID (D7): the bit present on the serial input pin at that moment.
  • I7.5, I6.5, I5.5 (D6–D4): 1 means an interrupt request is pending at that line.
  • IE (D3): 1 means maskable interrupts are enabled (EI executed).
  • M7.5, M6.5, M5.5 (D2–D0): 1 means that interrupt is masked (disabled).

Uses

  • To read serial input data (SID) from a device.
  • To check the present mask condition before changing it with SIM, so other mask bits are not disturbed.
  • To read which RST interrupts are pending. This allows polling of RST 5.5/6.5/7.5 inputs when interrupts are disabled.

Example

RIM          ; A <- status
ANI 08H      ; test IE bit (D3)
JZ  NOINT    ; if 0, interrupts are disabled

✓ Answer checked by Claude Opus 5.5 (high effort)

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