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RTL for LXI instruction

Short answer

LXI H,75H loads HL with 0075H in three machine cycles. Fetch: IR←M[PC], PC+1; then low-byte read: L←M[PC], PC+1 (L = 75H); and high-byte read: H←M[PC], PC+1 (H = 00H). RTL describes these register transfers explicitly.

Write the RTL for the instruction LXI H,75H in 8085 microprocessor. (Explain RTL based on an 8085 instruction; fetch and execution steps.)

Register Transfer Language (RTL) describes the operation of a processor as transfers of data between registers, using symbols: <- for transfer, [ ] for memory contents, MAR, MDR, PC, IR as registers.

LXI H,75H loads the 16-bit value 0075H into the HL pair: L gets 75H, H gets 00H. It is a 3-byte instruction (opcode 21H, 75H, 00H), taking 3 machine cycles (10 T-states). Assume it is stored from address X.

Machine cycle 1: opcode fetch (T1-T4)

T1: MAR <- PC
T2: MDR <- M[MAR] ;  PC <- PC + 1
T3: IR  <- MDR
T4: decode IR (opcode 21H = LXI H)

Machine cycle 2: memory read (low-order operand)

T1: MAR <- PC
T2: MDR <- M[MAR] ;  PC <- PC + 1
T3: L   <- MDR            (L = 75H)

Machine cycle 3: memory read (high-order operand)

T1: MAR <- PC
T2: MDR <- M[MAR] ;  PC <- PC + 1
T3: H   <- MDR            (H = 00H)

Result: HL = 0075H and PC points to the next instruction (X + 3). The first cycle is the fetch phase; the second and third cycles are the execution phase (reading the operand).

✓ Answer checked by Claude Opus 5.5 (high effort)

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