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Microprocessor-based transmission line protection

Short answer

A microprocessor-based line protection scheme samples line voltages and currents via CTs/PTs, scales and filters them, then converts to digital via multiplexed ADC. The microprocessor computes phasors using DFT, calculates apparent impedance for each zone, and compares with mho/quadrilateral characteristics. Zone 1 trips instantly; zones 2 and 3 trip after set delays. Output drivers operate auxiliary relays to trip the breaker, with event recording and SCADA communication.

Draw the block diagram of microprocessor based protective scheme for protection of transmission line.

In a microprocessor-based line protection scheme, the voltages and currents of the transmission line are sampled, converted to digital form and processed by a microprocessor that computes the apparent impedance (or other quantities) and issues a trip when a fault lies inside a protected zone. Usually it works as a distance (impedance/mho/quadrilateral) relay with three zones.

Block diagram

 Transmission line ══CB══════════════════
        │ CT (Ia,Ib,Ic)     │ PT (Va,Vb,Vc)
        ▼                   ▼
 ┌──────────────────────────────────┐
 │ Aux CTs/PTs, surge suppressors   │
 │ (isolation, scaling to ±10 V)    │
 └───────────────┬──────────────────┘
          [I→V converters]
                 │
       [Anti-aliasing LP filters]
                 │
       [Sample & hold circuits]
                 │
       [Analog multiplexer] ◄─ control
                 │
          [A/D converter]
                 │
 ┌───────────────▼──────────────────┐
 │  MICROPROCESSOR / DSP            │
 │  ROM: program  RAM: samples      │
 │  EEPROM: zone settings           │
 └──┬────────┬────────┬────────┬────┘
    │        │        │        │
 [Timer] [Output   [Display/ [Comm.
         interface]  keypad]  port]
             │
     [Driver + aux relay]──► CB trip coil
 [Digital inputs: CB status, carrier]
 [DC-DC power supply from battery]

Working

  1. Input stage: CT and PT outputs pass through auxiliary transformers which isolate and scale them; current signals are converted to voltages across precision resistors.
  2. Anti-aliasing filter: removes components above half the sampling frequency.
  3. Sample-and-hold + multiplexer: all six signals are sampled at the same instant (e.g. 12–20 samples per cycle) and passed one by one to the ADC.
  4. ADC: gives 12–16 bit binary numbers to the microprocessor.
  5. Microprocessor program:
    • Computes phasors of V and I by Fourier (DFT) or least-squares algorithms.
    • Computes apparent impedance Z = V/I (R and X) for each phase and phase pair, with residual compensation for earth faults.
    • Compares Z with zone 1, zone 2 and zone 3 characteristics (mho or quadrilateral).
    • Zone 1: instantaneous trip; zone 2 and zone 3: trip after timer delays (e.g. 0.3 s and 1 s).
    • Checks power swing, VT fuse failure, and carrier signals.
  6. Output interface: opto-isolated drivers operate auxiliary relays to trip the breaker and give alarms.
  7. Records events and disturbance data; communicates with SCADA.

Advantages: one hardware for many characteristics, self-checking, fault location, low burden and easy setting changes.

✓ Answer checked by Claude Opus 5.5 (high effort)

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