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- 2071 Magh · 4 marks
- 2069 Bhadra · 4 marks
Instruction cycle and machine cycle
Short answer
The instruction cycle is the total time to fetch and execute one instruction, composed of one or more machine cycles. A machine cycle is the time for a basic memory or I/O access (e.g., opcode fetch, read, write), lasting 3 to 6 T-states (clock periods).
Define instruction cycle and machine cycle.
Instruction cycle
The instruction cycle is the total time taken by the microprocessor to fetch an instruction from memory and execute it. It is made of one or more machine cycles. For example, MOV A,B has 1 machine cycle; LDA 2050H has 4 machine cycles.
Machine cycle
A machine cycle is the time required to complete one basic operation of accessing memory or an I/O device, such as opcode fetch, memory read, memory write, I/O read or I/O write. Each machine cycle consists of 3 to 6 clock periods called T-states.
T-state
One T-state is one period of the system clock (T = 1 / clock frequency). It is the smallest unit of timing.
8085 machine cycles
| Machine cycle | T-states | IO/M | S1 | S0 |
|---|---|---|---|---|
| Opcode fetch | 4 (sometimes 6) | 0 | 1 | 1 |
| Memory read | 3 | 0 | 1 | 0 |
| Memory write | 3 | 0 | 0 | 1 |
| I/O read | 3 | 1 | 1 | 0 |
| I/O write | 3 | 1 | 0 | 1 |
| Interrupt acknowledge | 6 (first, opcode) / 3 (others) | 1 | 1 | 1 |
Relation
1 instruction cycle = 1 to 5 machine cycles
1 machine cycle = 3 to 6 T-states
The first machine cycle of every instruction is always the opcode fetch. There is also a bus idle cycle, when the buses are not used (e.g. during the internal 16-bit addition of DAD).
✓ Answer checked by Claude Opus 5.5 (high effort)
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