- 2074 Chaitra · 5 marks
I/O mapped vs memory mapped I/O
Short answer
I/O-mapped I/O uses separate port addresses and IN/OUT instructions, while memory-mapped I/O shares the memory space and uses all memory instructions like MOV and STA. In 8085, MEMR' and MEMW' are generated by gating RD' and WR' with IO/M low; IOR' and IOW' by gating with IO/M high.
Differentiate I/O mapped I/O and memory mapped I/O with suitable examples. How can you generate I/O mapped and memory mapped signals using IO/M, RD and WR signals?
| Point | I/O mapped I/O | Memory mapped I/O |
|---|---|---|
| Address space | Separate 8-bit (256 ports) in 8085; 16-bit in 8086 | Shares memory space |
| Address bits | 8 bits (A0-A7) | 16 bits (A0-A15) |
| Instructions | Only IN, OUT (accumulator) | All memory instructions (MOV, ADD, LDA, STA) |
| Control signals | IO/M = 1, IOR', IOW' | IO/M = 0, MEMR', MEMW' |
| Memory available | Full memory for RAM/ROM | Reduced by ports |
| Speed | Slower for data processing | Faster, can operate on data directly |
| Decoding | Simple (8 bits) | More hardware (16 bits) |
| Example | IN 80H / OUT 81H | LDA 8000H / STA 9000H |
Generation of control signals (8085)
The 8085 gives RD', WR' and IO/M (high = I/O, low = memory). Combine them with gates:
MEMR' = RD' OR IO/M (low only when RD'=0 and IO/M=0)
MEMW' = WR' OR IO/M
IOR' = RD' OR (NOT IO/M) (low only when RD'=0 and IO/M=1)
IOW' = WR' OR (NOT IO/M)
RD' ----+--[OR]---- MEMR' RD' ---[OR]---- IOR'
IO/M ---+ IO/M -[NOT]--+
These signals then enable memory chips (MEMR', MEMW') or port devices (IOR', IOW'). A 3-to-8 decoder (74LS138) can be used with IO/M on an enable input.
✓ Answer checked by Claude Sonnet 5.5
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