Sample and hold: tracking and hold modes

A sample-and-hold (S/H) circuit takes the value of an analog signal at a sampling instant and holds it constant for the time the A/D converter needs to convert it. Without an S/H, the input could change during conversion and give a wrong digital output.

Circuit

            Switch S
 Vin --[Buf A1]--o/ o--+--[Buf A2]--> Vout
                       |
                      === C (hold capacitor)
                       |
                      GND
       Control (sample/hold) drives switch S

• A1: input buffer with low output impedance, so C charges quickly.
• S: electronic switch (FET/MOSFET) driven by the control (logic) signal.
• C: hold capacitor that stores the voltage.
• A2: output buffer with very high input impedance, so C does not discharge.

Tracking (sample) mode

• The control signal closes the switch.
• C charges through A1, and the output follows (tracks) the input: $V_{out}(t) \approx V_{in}(t)$.
• The time needed for the output to reach the input within the stated accuracy is the acquisition time.

Hold mode

• The control signal opens the switch at the sampling instant.
• C keeps the voltage it had at that instant. A2 draws almost no current, so $V_{out}$ stays constant.
• The A/D converter converts this steady voltage during the hold period.

 Ctrl:  |-- track --|-- hold --|-- track --|-- hold --|
 Vout:   follows Vin  constant  follows Vin  constant

Use in digital control

1. At each sampling instant $kT$ the controller switches the S/H to hold and starts the ADC.
2. After conversion it returns the S/H to track mode, so it follows the signal until the next instant.
3. In a multichannel data acquisition system, one S/H after the multiplexer holds each channel in turn; at the output, hold circuits (ZOH) keep each D/A output constant between updates.

Important non-ideal terms

• Aperture time: delay between the hold command and the switch actually opening.
• Droop: slow fall of the held voltage due to leakage current, $dV/dt = I_{leak}/C$.
• Feedthrough: small part of the input appearing at the output during hold.

Mathematically, the S/H acts as an ideal sampler followed by a zero order hold, $G_{h0}(s) = \frac{1-e^{-Ts}}{s}$.