- 2070 Asar · 7 marks
SC filter: 6 dB peak at 400 rad/s
Short answer
Transfer function T(s) = (s+200)(s+800)/(s+400)^2. Two cascaded inverting stages with C1=C2=100 pF: stage1 zero at 200 rad/s (CR1=1 pF), pole at 400 rad/s (CR2=2 pF); stage2 zero at 800 rad/s (CR1=4 pF), pole at 400 rad/s (CR2=2 pF). Clock fc=20 kHz.
Design a switched capacitor filter having following characteristics. [Figure: |T(jω)| vs ω rad/s: 0 dB up to 200, rising to a 6 dB peak at 400, falling back to 0 dB at 800]
Reading the plot. The response rises from 0 dB at 200 to 6 dB at 400 (one octave, i.e. 20 dB/decade): a zero at 200. At 400 the slope changes from +20 to −20 dB/decade, a change of −40 dB/decade, so a double pole at 400. It reaches 0 dB at 800 and stays flat: a zero at 800.
(gain constant .)
Building block (first-order SC section). An inverting op-amp stage with input admittance and feedback admittance gives
Each resistor is replaced by a switched capacitor clocked at (two-phase, non-overlapping clock), for which . Then
With the high-frequency gain is 1 and , . Two inverting stages in cascade give a positive overall gain.
Splitting into two first-order sections:
Choice of clock and capacitors. Highest break is 800 rad/s ( Hz); take kHz. Take pF in both stages. With :
| Stage | (zero) | (pole) | ||
|---|---|---|---|---|
| 1 | 100 pF | 1 pF | 2 pF | |
| 2 | 100 pF | 4 pF | 2 pF |
Final circuit (two identical-form stages in cascade; each SC resistor is the toggle-switch circuit shown):
C2
+-------||------+
| |
+---[CR2-SC]----+
| |
C1 | |\ |
Vi -+--||--+---|-\ |
| | | >--------+---> Vo
+[CR1]-+ +-|+/
(SC) | |/
GND
phi1 phi2
V1 ----o/o----+----o/o---- V2
|
=== CR
|
GND
Clock: kHz, two-phase non-overlapping. Equivalent resistors: 50 MΩ, 25 MΩ (stage 1) and 12.5 MΩ, 25 MΩ (stage 2).
Answer: , two cascaded SC sections, pF, switched capacitors 1 & 2 pF and 4 & 2 pF, kHz. The design follows the asymptotes; the actual peak at is 1.94 dB.
✓ Answer checked by Claude Sonnet 5.5
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