Machine from 4-state diagram using SR

The diagram is a Mealy machine with 4 states already coded as $Q_1 Q_0$ = 00, 01, 10, 11, so no extra state assignment is needed. Input X, output Z, two S-R flip-flops ($Q_1$ = MSB). Each state stays in itself on one input value and moves to the next state on the other.

State diagram (given)

Arc label = input/output

 00 --0/0--> 01 --1/0--> 10 --0/0--> 11 --1/0--> 00

 00 --1/1--> 00  (self loop)
 01 --0/1--> 01  (self loop)
 10 --1/0--> 10  (self loop)
 11 --0/1--> 11  (self loop)

State table

Excitation table of S-R flip-flop

Transition and excitation table

K-maps and simplified equations

S1          X=0  X=1
Q1Q0=00       0    0
Q1Q0=01       0    1
Q1Q0=11       x    0
Q1Q0=10       x    x

R1          X=0  X=1
Q1Q0=00       x    x
Q1Q0=01       x    0
Q1Q0=11       0    1
Q1Q0=10       0    0

S0          X=0  X=1
Q1Q0=00       1    0
Q1Q0=01       x    0
Q1Q0=11       x    0
Q1Q0=10       1    0

R0          X=0  X=1
Q1Q0=00       0    x
Q1Q0=01       0    1
Q1Q0=11       0    1
Q1Q0=10       0    x

Z           X=0  X=1
Q1Q0=00       0    1
Q1Q0=01       1    0
Q1Q0=11       1    0
Q1Q0=10       0    0

$$\begin{aligned} S_1 &= Q_1' Q_0 X \\ R_1 &= Q_1 Q_0 X \\ S_0 &= X' \\ R_0 &= X \\ Z &= Q_0 X' + Q_1' Q_0' X \end{aligned}$$

Logic diagram

           +-------------+     +----------+
 X  ------>| next-state  |---->| FF1, FF0 |--+--> Q1, Q0
    +----->| logic       |     |  (CLK)   |  |
    |      +-------------+     +----------+  |
    +-------------------<--------------------+
    |      +-------------+
    +----->| output      |----> Z
 X  ------>| logic       |
           +-------------+

Gates needed (two S-R flip-flops with a common clock; complements are taken from the $Q'$ outputs or NOT gates):

• $S_1$: a 3-input AND for $Q_1' Q_0 X$.
• $R_1$: a 3-input AND for $Q_1 Q_0 X$.
• $S_0$: direct line $X'$.
• $R_0$: direct line $X$.
• $Z$: a 2-input AND for $Q_0 X'$; a 3-input AND for $Q_1' Q_0' X$, combined in a 2-input OR gate.

Check: from 00, X = 10101 gives states 00 → 00 → 01 → 10 → 11 → 00 and Z = 10000, matching the diagram. $S_1 R_1$ and $S_0 R_0$ are never both 1.