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Static differential relay

Short answer

It compares line and terminal currents. Spill current |i1−i2| is rectified to V_o; bias voltage V_r ∝ (|i1|+|i2|)/2 from separate rectifiers. Amplitude comparator trips when V_o > K·V_r (percentage bias). Harmonic restraint (e.g. 2nd) blocks trip during transformer inrush.

Explain the working principle of static differential relay with the proper block diagram and circuit diagram.

A static differential relay compares the currents at the two ends of a protected zone (transformer, generator, bus) using electronic circuits. It trips when the difference (spill) current exceeds a set percentage of the through (bias) current.

Block diagram

 CT1 ─┐                         ┌─ CT2
      ▼                         ▼
 [Aux CT]                    [Aux CT]
      │  i1                  i2 │
      ├────────┬───────────────┤
      │        │               │
 [Bias rect]  [Diff (spill)   [Bias rect]
      │        rectifier]      │
      └──► Σ bias  │ operate ◄─┘
             │     │
        ┌────▼─────▼─────┐
        │ Amplitude       │
        │ comparator      │
        └───────┬─────────┘
           [Level detector]
           [Harmonic restraint]
           [Amplifier]→[Output]→Trip

Circuit (simplified)

 CT1 sec (i1)              CT2 sec (i2)
   │                          │
   ├─[bridge B1]─┐  ┌─[bridge B2]─┤
   │             ▼  ▼             │
   │        R_b ─┴──┴─ R_b        │
   │      bias voltage V_r        │
   │      ∝ (|i1| + |i2|)/2       │
   └────────[bridge B3]───────────┘
            spill |i1 − i2|
                 │
             R_o → V_o (operate)
                 │
 [comparator: V_o − K·V_r > 0 ?] → trip

Working principle

  1. Auxiliary CTs step down currents i1 and i2 and correct ratio/phase mismatch.
  2. Bias (restraining) circuit: rectifies i1 and i2 and forms V_r ∝ (|i1| + |i2|)/2, the through current.
  3. Operating (spill) circuit: rectifies the difference |i1 − i2| to give V_o.
  4. Comparator: an amplitude comparator (rectifier bridge or op-amp) compares V_o with K·V_r. Trip when |i1 − i2| > K·(|i1|+|i2|)/2 (percentage bias, K ≈ 10–40%).
  5. Harmonic restraint (for transformers): a filter extracts the 2nd harmonic of the spill current; if it is large (inrush), the trip is blocked. 5th-harmonic restraint blocks tripping during over-excitation.
  6. Level detector and output: when the comparator output exceeds threshold, a transistor/thyristor switches the trip relay.

Advantages over electromechanical type

Very fast (about 1 cycle), low CT burden, precise bias slope, easy harmonic restraint, and unaffected by vibration. Used for transformer, generator and busbar protection.

✓ Answer checked by Claude Opus 5.5 (high effort)

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