- 2072 Asoj · 1+5+2 marks
Bus organization and memory capacity
Short answer
A microprocessor uses three buses: address (unidirectional, selects location), data (bidirectional, transfers data), and control (timing and direction signals). With a 24‑line address bus, 2^24 = 16 M locations are addressable; a 16‑bit data bus makes each location 2 bytes, giving a total capacity of 32 MB.
What is Bus? Explain Bus organization of microprocessor with diagram. Calculate the memory handling capacity of the processor having address bus of 24 lines and data bus of 16 lines.
Bus
A bus is a set of parallel lines that carries information (address, data, control signals) between the CPU, memory and I/O devices.
Bus organization
+-------+ +-----------+ +-----------+
| CPU | | Memory | | I/O |
| | | (ROM/RAM) | | (ports) |
+-+-+-+-+ +-+---+---+-+ +-+---+---+-+
| | | | | | | | |
==+=+=+=========+===+===+=========+===+===+== Address bus (n lines, CPU -> others)
| | | | | |
==+=+===========+===+=============+===+====== Data bus (m lines, two way)
| | |
==+=================+=================+====== Control bus (RD, WR, IO/M ...)
- Address bus: one-directional, from CPU to memory/I/O. It selects one location out of 2ⁿ.
- Data bus: bi-directional; moves data and instruction codes. Its width gives the word size.
- Control bus: signals like memory read/write, I/O read/write, interrupt, ready, hold, clock and reset that coordinate the transfers.
All devices share these common buses, and only the device selected by the address decoder responds.
Memory capacity
Address lines = 24, so the number of locations = 2²⁴ = 16,777,216 = 16 M locations.
Data bus = 16 lines. Assuming each location holds one data-bus-wide word, each location is 16 bits = 2 bytes.
Total bits = 2^24 x 16 = 268,435,456 bits
Total bytes = 16 M x 2 = 32 MB
Answer: 16 M locations of 16 bits each = 32 MB. (If memory is organised as 8-bit bytes, the processor can address 2²⁴ = 16 MB.)
✓ Answer checked by Claude Opus 5.5 (high effort)
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