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Two-input sequential circuit using T

Short answer

A 2-bit counter with T flip-flops uses XY to select the counting mode. The excitation equations are T1 = Q0 X' Y' + Q0' Y + Q1 Q0' X + Q1' Q0 Y' + XY and T0 = Q1 Q0 + Q1 XY + Q1' Q0' Y' + Q1' X' + X' Y'.

Design a sequential circuit with T flip-flop and two inputs X and Y. If X=1 and Y=0 the circuit goes through 00 to 01 to 11 to 10. When X=Y=1, the circuit goes through the transition from 00 to 10 to 01 to 11. When X = 0 and Y=1, the circuit goes through 00 to 11 to 10 to 00. When X = Y = 0, the circuit 00 to 01 to 10 to 11 and repeats.

The circuit has 2 flip-flops (Q1Q0Q_1 Q_0, Q1Q_1 = MSB), two control inputs X, Y, no separate output (the outputs are the states). It is a counter whose counting sequence is chosen by XY. Flip-flops: T.

Assumptions: each sequence returns to 00 after its last state (XY = 10: 10 → 00; XY = 11: 11 → 00; XY = 00: 11 → 00). For XY = 01 the state 01 is not in the given sequence, so it is taken to go to 00 (keeps the circuit from locking).

State diagram

Arc label = XY

 00 -10-> 01 -10-> 11 -10-> 10 -10-> 00
 00 -11-> 10 -11-> 01 -11-> 11 -11-> 00
 00 -01-> 11 -01-> 10 -01-> 00
          01 -01-> 00 (assumed)
 00 -00-> 01 -00-> 10 -00-> 11 -00-> 00

State table (next state)

Present Q1Q0Q_1 Q_0XY=00XY=01XY=10XY=11
0001110110
0110001111
1011000001
1100101000

Excitation table of T flip-flop

QQ+T
000
011
101
110

T = 1 whenever the flip-flop must change (T=Q⊕Q+T = Q \oplus Q^+).

Transition and excitation table

Q1 Q0X YQ1+ Q0+T1T0
0 00 00 101
0 00 11 111
0 01 00 101
0 01 11 010
0 10 01 011
0 10 10 001
0 11 01 110
0 11 11 110
1 00 01 101
1 00 10 010
1 01 00 010
1 01 10 111
1 10 00 011
1 10 11 001
1 11 01 001
1 11 10 011

K-maps and simplified equations

T1          XY=00  XY=01  XY=11  XY=10
Q1Q0=00         0      1      1      0
Q1Q0=01         1      0      1      1
Q1Q0=11         1      0      1      0
Q1Q0=10         0      1      1      1

T0          XY=00  XY=01  XY=11  XY=10
Q1Q0=00         1      1      0      1
Q1Q0=01         1      1      0      0
Q1Q0=11         1      1      1      1
Q1Q0=10         1      0      1      0
T1=Q0X′Y′+Q0′Y+Q1Q0′X+Q1′Q0Y′+XYT0=Q1Q0+Q1XY+Q1′Q0′Y′+Q1′X′+X′Y′\begin{aligned} T_1 &= Q_0 X' Y' + Q_0' Y + Q_1 Q_0' X + Q_1' Q_0 Y' + X Y \\ T_0 &= Q_1 Q_0 + Q_1 X Y + Q_1' Q_0' Y' + Q_1' X' + X' Y' \end{aligned}

Logic diagram

          +---------------+   T1  +------+
 X ------>|  T-input      |------>| FF1  |--+-- Q1
 Y ------>|  logic        |   T0  +------+  |
    +---->|  (equations)  |------>| FF0  |--+-- Q0
    |     +---------------+       +------+  |
    |      CLK to both FFs                  |
    +------------ Q1, Q0 fed back ----------+

Gates needed:

  • T1T_1: a 3-input AND for Q0X′Y′Q_0 X' Y'; a 2-input AND for Q0′YQ_0' Y; a 3-input AND for Q1Q0′XQ_1 Q_0' X; a 3-input AND for Q1′Q0Y′Q_1' Q_0 Y'; a 2-input AND for XYX Y, combined in a 5-input OR gate.
  • T0T_0: a 2-input AND for Q1Q0Q_1 Q_0; a 3-input AND for Q1XYQ_1 X Y; a 3-input AND for Q1′Q0′Y′Q_1' Q_0' Y'; a 2-input AND for Q1′X′Q_1' X'; a 2-input AND for X′Y′X' Y', combined in a 5-input OR gate.

Check: with XY = 10 from 00 the equations give 00 → 01 → 11 → 10 → 00; with XY = 11, 00 → 10 → 01 → 11 → 00, as required.

✓ Answer checked by Claude Opus 5.5 (high effort)

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