Synchronous circuits; asynchronous decade counter

Synchronous sequential circuit

A synchronous sequential circuit is a sequential circuit whose state changes only at discrete instants fixed by a common clock signal (at the clock edge). All memory elements (flip-flops) are driven by the same clock, so the outputs are predictable and free of timing races.

Asynchronous decade counter

An asynchronous decade (mod-10) counter counts 0 (0000) to 9 (1001) and resets on the 10th clock pulse.

Circuit: four negative-edge triggered JK flip-flops with $J = K = 1$. CLK drives FF0; $Q_0$, $Q_1$, $Q_2$ drive the clocks of FF1, FF2, FF3. A NAND gate of $Q_3$ and $Q_1$ drives the active-low CLEAR of all flip-flops.

     J=K=1       J=K=1       J=K=1       J=K=1
    +-----+     +-----+     +-----+     +-----+
CLK-o FF0 |Q0--o FF1 |Q1--o FF2 |Q2--o FF3 |Q3
    +--o--+     +--o--+     +--o--+     +--o--+
      CLR         CLR         CLR         CLR

Q3  ---|      |
       | NAND |o--> CLR of all FFs (active low)
Q1  ---|      |

Operation

1. All flip-flops are cleared first, so the count is 0000.
2. FF0 toggles on each falling edge of CLK. FF1 toggles whenever $Q_0$ goes 1→0, FF2 whenever $Q_1$ goes 1→0, FF3 whenever $Q_2$ goes 1→0. This produces the binary up count.
3. On the 10th pulse the outputs reach 1010. This is the first state with $Q_3 = Q_1 = 1$, so the NAND output goes low and clears all flip-flops to 0000. The counter therefore has 10 stable states (0–9).

Timing diagram

CLK  __|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾
Q3   ________________________________|‾‾‾‾‾‾‾|___
Q2   ________________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|___________
Q1   ________|‾‾‾‾‾‾‾|_______|‾‾‾‾‾‾‾|___________
Q0   ____|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___
Cnt  0    1   2   3   4   5   6   7   8   9   0

Each stage changes on the falling edge of the stage before it. $Q_3$ gives one pulse for every 10 clock pulses ($f_{clk}/10$). Because the stages change one after another, the real outputs are delayed by $t_{pd}$ per stage and a short glitch appears at the reset (state 1010). IC 7490 is a commercial decade ripple counter.