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BCD synchronous counter using T flip-flops

Short answer

A BCD synchronous counter with T flip-flops uses 4 flip-flops, counting 0000 to 1001. The T inputs are T3 = Q3Q0 + Q2Q1Q0, T2 = Q1Q0, T1 = Q3'Q0, T0 = 1. Unused states lead to valid counts, making it self-starting.

Design BCD synchronous counter with circuit diagram, truth table and timing waveform. Use T flip-flop.

A BCD (decade) synchronous counter counts 0000 to 1001 and returns to 0000 on the 10th clock. All T flip-flops share the clock. A T flip-flop toggles when T=1T = 1 and holds when T=0T = 0, so T=Q⊕Q+T = Q \oplus Q^+.

Truth (excitation) table

4 flip-flops are needed (24=16≥102^4 = 16 \ge 10); states 1010–1111 are don't cares.

Present Q3Q2Q1Q0Next Q3Q2Q1Q0T3T2T1T0
000000010001
000100100011
001000110001
001101000111
010001010001
010101100011
011001110001
011110001111
100010010001
100100001001

K-map simplification

T1: Q3Q2 / Q1Q000011110
000110
010110
11XXXX
1000XX
T3: Q3Q2 / Q1Q000011110
000000
010010
11XXXX
1001XX

Similarly T2T_2 is 1 for states 0011 and 0111, giving T2=Q1Q0T_2 = Q_1Q_0, and T0=1T_0 = 1.

T3=Q3Q0+Q2Q1Q0T2=Q1Q0T1=Q3‾Q0T0=1\begin{aligned} &T_3 = Q_3Q_0 + Q_2Q_1Q_0 \\ &T_2 = Q_1Q_0 \\ &T_1 = \overline{Q_3}Q_0 \\ &T_0 = 1 \end{aligned}

Circuit diagram

   +-----+       +-----+       +-----+       +-----+
T0>|T   Q|-Q0 T1>|T   Q|-Q1 T2>|T   Q|-Q2 T3>|T   Q|-Q3
   | FF0 |       | FF1 |       | FF2 |       | FF3 |
   |     |       |     |       |     |       |     |
   +--o--+       +--o--+       +--o--+       +--o--+
      |             |             |             |
CLK---+-------------+-------------+-------------+
T0 = 1           T1 = Q3'.Q0
T2 = Q1.Q0       T3 = Q3.Q0 + Q2.Q1.Q0

Timing waveform

CLK  __|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾
Q3   ________________________________|‾‾‾‾‾‾‾|_______
Q2   ________________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|_______________
Q1   ________|‾‾‾‾‾‾‾|_______|‾‾‾‾‾‾‾|_______________
Q0   ____|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾|___|‾‾‾
Cnt  0    1   2   3   4   5   6   7   8   9   0   1
  • Q0Q_0 toggles on every falling edge (fclk/2f_{clk}/2).
  • Q1Q_1 toggles when Q0=1Q_0 = 1, except at 9 where Q3‾=0\overline{Q_3} = 0 blocks it.
  • Q2Q_2 toggles when Q1Q0=1Q_1Q_0 = 1 (at 3 → 4 and 7 → 8).
  • Q3Q_3 sets at 7 → 8 (Q2Q1Q0=1Q_2Q_1Q_0 = 1) and resets at 9 → 0 (Q3Q0=1Q_3Q_0 = 1); its frequency is fclk/10f_{clk}/10.

Unused states return to the count (1010→1011→0110, 1100→1101→0100, 1110→1111→0010), so the counter is self-starting.

✓ Answer checked by Claude Opus 5.5 (high effort)

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