- 2081 Bhadra · 3+5 marks
Negative edge JK flip-flop; T to JK conversion
Short answer
A negative edge-triggered JK flip-flop changes state only at the falling clock edge. Truth table: J=0,K=0 holds; J=0,K=1 resets; J=1,K=0 sets; J=1,K=1 toggles. To convert a T flip-flop into a JK flip-flop, derive T = J Q_n' + K Q_n using excitation tables and K-map, then feed this expression to the T input.
Explain briefly the operation of negative edge-triggered JK flip flop with its truth table. Convert T flip-flop into JK flip-flop.
Negative edge-triggered JK flip-flop
A negative edge-triggered JK flip-flop changes state only at the falling (HIGH-to-LOW) edge of the clock. An edge detector produces a narrow pulse at the falling edge, and only during that pulse are J and K allowed to act. Its symbol has a triangle with a bubble at CLK. Since the inputs act for a very short time, the output can change only once per clock, so there is no race-around.
| CLK | J | K | Action | |
|---|---|---|---|---|
| Falling edge | 0 | 0 | No change | |
| Falling edge | 0 | 1 | 0 | Reset |
| Falling edge | 1 | 0 | 1 | Set |
| Falling edge | 1 | 1 | Toggle | |
| 0, 1, rising | X | X | No change |
Converting T flip-flop into JK flip-flop
We need a circuit with inputs J, K, whose output drives T. T excitation: when the state must change.
| J | K | T | ||
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 0 | 1 |
K-map for T
KQn=00 01 11 10
J=0 0 0 1 0
J=1 1 0 1 1
- Cells 011, 111 (, ) give .
- Cells 100, 110 (, ) give .
Circuit
J --[AND]--+
Q'--[ ] +--[OR]-- T +--------+--- Q
K --[AND]--+ | T FF |
Q --[ ] | CLK |--- Q'
+--------+
(Q and Q' fed back to the AND gates)
Check: gives , so it toggles; gives , no change.
✓ Answer checked by Claude Opus 5.5 (high effort)
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