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Chapter 6 · 5 hours

Log-Antilog Circuit Applications

IOE past exam questions

Past questions and answers

12 questions set from this chapter, 5 of them more than once. Most asked first.

  • Asked 5 times
  • 2074 Asoj · 3 marks
  • 2074 Chaitra · 3 marks
  • 2073 Shrawan · 3 marks
  • 2073 Chaitra · 5 marks
  • 2072 Chaitra · 3 marks

Write a short note on generation of RMS output of sinusoidal wave (process of RMS detection of sine wave) using log antilog application.

Answer

The RMS value of a signal is the square root of the mean of its square:

Vrms = √( (1/T) ∫₀^T v² dt )

For a sine wave v = Vm sin ωt, Vrms = Vm/√2 = 0.707 Vm. Log and antilog amplifiers can compute this directly. Squaring and square-rooting become multiplication of a log by 2 and by ½.

Block diagram (explicit method):

 v(t) -> [Precision rectifier |v|]
          -> [LOG] -> [x(-2)] -> [ANTILOG] = v^2
          -> [LPF / averager]              = mean(v^2)
          -> [LOG] -> [x(-1/2)] -> [ANTILOG]
          -> Vrms

Steps:

  1. A precision full-wave rectifier gives |v|, because a log amp accepts only one polarity.
  2. The log amp gives −K ln|v|. An inverting amplifier of gain −2 makes it 2K ln|v|. The antilog amp then gives v².
  3. A low-pass filter or averager, with a time constant much longer than the signal period, gives the mean of v². For a sine wave this is Vm²/2.
  4. A second log amp, a gain of −½ and an antilog amp take the square root:
Vo = √( mean(v²) ) = √(Vm²/2) = Vm/√2 = 0.707 Vm

Implicit method (fewer stages): the output is fed back into the log–antilog block to form Vo = mean(v²/Vo). At steady state Vo² = mean(v²), so Vo = Vrms directly. This gives a wider dynamic range.

The result is a true-RMS reading, correct for any waveform and not only sine waves. It is used in true-RMS voltmeters and power measurement. Example IC: AD536.

  • Asked 2 times
  • 2073 Chaitra · 2+4 marks
  • 2071 Chaitra · 1+6 marks

Why log antilog amplifier circuits are required? Draw the circuit diagram of antilog (analog) multiplier and explain it.

Answer

Why log–antilog circuits are required

Logarithms turn multiplication into addition and powers into multiplication by a constant:

ln(xy)  = ln x + ln y
ln(x/y) = ln x − ln y
ln(xⁿ)  = n ln x

Adders, subtractors and gain stages are easy to build with op-amps. So log and antilog amplifiers let simple linear circuits perform non-linear operations:

  • Analog multiplication and division of signals
  • Powers and roots (square, square root, xⁿ), RMS and vector magnitude
  • Compression of signals with a very wide dynamic range (5–6 decades) into a small voltage range, for example in sonar, radar, audio and dB meters
  • Linearizing sensors with exponential responses, and pH or light measurement

Antilog (analog) multiplier

Building blocks used (all voltages in volts, Vref = 1 V, K = scale factor such as VT or 1 V/decade):

  • Log amp (L): output = −K ln(Vin), for Vin > 0
  • Antilog amp (E): output = exp(Vin/K)
  • Inverting amp of gain −m: output = −m × input
 V1 -> [LOG A1] --Va--[R]--+
                           |       R
 V2 -> [LOG A2] --Vb--[R]--+--+--/\/\/--+
                              |         |
                            (-)\  A3    |
                       GND--(+)  >------+--> Vs
 Vs -> [ANTILOG A4] -> Vo

Working:

  1. Log stages: A1 and A2 (each with a transistor in feedback) give:
Va = −K ln V1
Vb = −K ln V2
  1. Inverting summer A3 with all resistors R:
Vs = −(Va + Vb) = K (ln V1 + ln V2) = K ln(V1·V2)
  1. Antilog stage A4:
Vo = exp(Vs/K) = exp( ln(V1·V2) ) = V1·V2

With a general reference voltage the scaled result is Vo = V1·V2/Vref. For example, V1 = 2 V and V2 = 3 V give Vo = 6 V (Vref = 1 V).

Division: replace the summer with a difference amplifier. Then Vs = K ln(V1/V2) and Vo = V1/V2.

Limitation: the inputs must be positive (one-quadrant operation). Matched transistors and temperature-compensating resistors are needed for accuracy.

  • Asked 2 times
  • 2072 Chaitra · 3+4 marks
  • 2071 Shrawan · 3+4 marks

Construct a circuit that generates square root of an input voltage and derive its input-output relationship. Draw a circuit that produces the output voltage V0 = √((V1·V2)² + (V3·V4)²).

Answer

Square-root circuit

Taking a square root means multiplying the logarithm by ½: √Vi = exp(½ ln Vi).

Building blocks used (all voltages in volts, Vref = 1 V, K = scale factor such as VT or 1 V/decade):

  • Log amp (L): output = −K ln(Vin), for Vin > 0
  • Antilog amp (E): output = exp(Vin/K)
  • Inverting amp of gain −m: output = −m × input
                                R/2
                          +---/\/\/---+
                          |           |
 Vi -> [LOG] --V1'--[R]---+--(-)\     |
                                  >---+--> V2'
                         GND--(+)/
 V2' -> [ANTILOG] -> Vo

Derivation:

  1. Log amp: V1' = −K ln Vi
  2. Inverting amplifier with gain −(R/2)/R = −½:
V2' = −½ × (−K ln Vi) = (K/2) ln Vi
  1. Antilog amp:
Vo = exp(V2'/K) = exp(½ ln Vi) = Vi^(1/2)

Result: Vo = √Vi. With a general reference, Vo = √(Vref·Vi). For example, Vi = 9 V gives Vo = 3 V (Vref = 1 V). The input must be positive.

Circuit for V0 = √((V1·V2)² + (V3·V4)²)

Plan: form (V1V2)² and (V3V4)² with log–antilog stages, add them, then take the square root.

 V1->[LOG]-+
           +->[summer, gain -2]->[ANTILOG]->(V1V2)^2 -+
 V2->[LOG]-+                                         |
                                       [SUMMER] <----+
 V3->[LOG]-+                              ^    |
           +->[summer, gain -2]->[ANTILOG]+    | S
 V4->[LOG]-+              (V3V4)^2             v
          S -> [LOG] -> [gain -1/2] -> [ANTILOG] -> V0

Step by step:

  1. Log amps give −K ln V1, −K ln V2, −K ln V3 and −K ln V4.
  2. Inverting summer with gain 2 (input resistors R, feedback 2R):
Va = −2(−K ln V1 − K ln V2) = 2K ln(V1V2)

The antilog gives exp(Va/K) = (V1V2)². In the same way the second branch gives (V3V4)².

  1. A non-inverting summer (or an inverting summer followed by an inverter) gives:
S = (V1V2)² + (V3V4)²
  1. The square-root block (log, gain −½, antilog) gives:
V0 = √S = √( (V1V2)² + (V3V4)² )

All inputs must be positive (or first passed through precision rectifiers, since the result depends only on squares). The circuit uses 8 log or antilog amps (5 log, 3 antilog) plus the summing and scaling op-amps.

  • Asked 2 times
  • 2069 Asar · 7 marks
  • 2068 Chaitra · 7 marks

Design a circuit that produces output voltage V0 = (Vx/Vy)^α · Vz using Log and Antilog amplifiers, where α > 1 and Vx, Vy and Vz are analog input voltages. [Hint: ln(x^a) = a ln x]

Answer

The idea is to work in the logarithmic domain:

ln V0 = α (ln Vx − ln Vy) + ln Vz
V0 = exp[ α ln(Vx/Vy) + ln Vz ] = (Vx/Vy)^α · Vz

So the circuit must find logs, subtract, multiply by α, add, and take the antilog.

Building blocks used (all voltages in volts, Vref = 1 V, K = scale factor such as VT or 1 V/decade):

  • Log amp (L): output = −K ln(Vin), for Vin > 0
  • Antilog amp (E): output = exp(Vin/K)
  • Inverting amp of gain −m: output = −m × input

Block diagram

 Vx->[LOG A1]--Vx'-->(-)[A4: diff amp]
 Vy->[LOG A2]--Vy'-->(+)[ gain 1     ]--Vd
                                          |
             [A5: non-inverting, gain α]<-+
                          |
                          Ve
                          v
                    (+)[A6: diff amp]--Vs
 Vz->[LOG A3]--Vz'->(-)[ gain 1     ]   |
                                       v
                          [ANTILOG A7] --> V0

Design steps

  1. Log amplifiers (transistor in feedback, matched, all with the same K):
Vx' = −K ln Vx,  Vy' = −K ln Vy,  Vz' = −K ln Vz
  1. Difference amplifier A4 (all four resistors R = 10 kΩ), with Vy' on the (+) input and Vx' on the (−) input:
Vd = Vy' − Vx' = K (ln Vx − ln Vy) = K ln(Vx/Vy)
  1. Non-inverting amplifier A5 with gain α = 1 + Rf/R1:
Ve = α K ln(Vx/Vy) = K ln( (Vx/Vy)^α )

Since α > 1, a non-inverting amplifier can give it directly:

Rf = (α − 1) R1

For example, α = 2.5 with R1 = 10 kΩ gives Rf = 15 kΩ. Make Rf variable to set any α.

  1. Difference amplifier A6 (all resistors R), with Ve on the (+) input and Vz' on the (−) input:
Vs = Ve − Vz' = K ln( (Vx/Vy)^α ) + K ln Vz
   = K ln( (Vx/Vy)^α · Vz )
  1. Antilog amplifier A7:
V0 = exp(Vs/K) = (Vx/Vy)^α · Vz

Check

Take Vx = 4 V, Vy = 2 V, Vz = 1.5 V, α = 2. Then V0 = (2)² × 1.5 = 6 V.

Notes: Vx, Vy and Vz must be positive. The log amps use matched transistors and temperature-compensating resistors, so Is and VT cancel. The output is scaled by the reference voltage (1 V here).

  • Asked 2 times
  • 2071 Chaitra · 3 marks
  • 2068 Chaitra · 3 marks

Write a short note on applications of log and antilog amplifier.

Answer

A log amplifier gives an output proportional to the logarithm of its input, Vo = −V_T ln(Vi/(R·Is)), and an antilog amplifier gives Vo = −R·Is·e^(Vi/V_T). Used together, they turn multiplication, division and powers into simple addition, subtraction and scaling of voltages.

Main applications:

  1. Analog multiplier: log V1 + log V2, then antilog → Vo ∝ V1·V2.
  2. Analog divider: log V1 − log V2, then antilog → Vo ∝ V1/V2.
  3. Raising to a power / taking roots: scale the log output by m (resistor ratio), then antilog → Vo ∝ Vi^m (m = 2 for squaring, m = 0.5 for square root).
  4. Multifunction converter: Vo = Vy·(Vz/Vx)^m, one circuit giving multiply, divide, power and root.
  5. True RMS converter: squaring, averaging and square-rooting a signal using log-antilog blocks.
  6. Signal compression: a log amp compresses a wide dynamic range (e.g. 1 mV to 10 V) into a small output range, used in audio, sonar, radar and pH/light measurement.
  7. Decibel (dB) meters: output directly proportional to log of signal level.
  8. Linearising sensors that have exponential response (e.g. photodiodes, thermistors).

Limitation: simple log amps work only for one polarity of input (one-quadrant) and need temperature compensation because V_T and Is depend on temperature.

  • 2074 Asoj · 7 marks

Draw the detailed circuit diagram for four quadrant multiplier and derive its input and output relationship.

Answer

A four-quadrant multiplier gives Vo = K·Vx·Vy for both positive and negative values of Vx and Vy. The standard circuit is the Gilbert cell (variable-transconductance multiplier), used in ICs such as AD633 and MC1496.

Circuit

           +Vcc        +Vcc
            |            |
           RL           RL
            |  Io1   Io2 |
            +---+    +---+---> Vo (differential)
            |   |    |   |
           Q3  Q4   Q5  Q6     upper pairs: input Vx
            \  /     \  /       (Q3,Q6 bases at +Vx/2,
             \/       \/         Q4,Q5 bases at -Vx/2)
             I1        I2
             |         |
            Q1 ------ Q2       lower pair: input Vy
              \      /
               \    /
                IEE (tail current source)
                 |
               -VEE

Collectors of Q3 and Q5 are joined (current Io1), and collectors of Q4 and Q6 are joined (current Io2).

Derivation

For a BJT differential pair with tail current I and differential input V, the collector current difference is

ΔI = I · tanh(V / 2V_T)

Lower pair (Q1, Q2), input Vy:

I1 − I2 = IEE · tanh(Vy / 2V_T)

Upper pairs: Q3–Q4 is fed by I1 and Q5–Q6 by I2, both driven by Vx but cross-connected:

(IC3 − IC4) =  I1 · tanh(Vx / 2V_T)
(IC6 − IC5) =  I2 · tanh(Vx / 2V_T)

Output current difference:

ΔIo = Io1 − Io2 = (IC3 + IC5) − (IC4 + IC6)
    = (IC3 − IC4) − (IC6 − IC5)
    = (I1 − I2) · tanh(Vx / 2V_T)
    = IEE · tanh(Vx/2V_T) · tanh(Vy/2V_T)

For small inputs (|V| << 2V_T), tanh(u) ≈ u:

ΔIo ≈ IEE · Vx · Vy / (4 V_T²)
Vo  = RL · ΔIo = (IEE · RL / 4V_T²) · Vx · Vy
Vo  = K · Vx · Vy,   K = IEE·RL / (4 V_T²)

Since tanh is an odd function, the sign of ΔIo follows the signs of both Vx and Vy, so the circuit works in all four quadrants. In practical ICs, emitter-degeneration resistors and pre-distortion (log) circuits extend the linear range so that K becomes a fixed constant, usually 1/10 V⁻¹ (Vo = Vx·Vy/10).

  • 2073 Shrawan · 1+7 marks

How four quadrant multiplier differs from single quadrant multiplier? Derive output voltage of four quadrant multiplier with necessary diagrams.

Answer

Difference between four-quadrant and single-quadrant multiplier

PointSingle-quadrantFour-quadrant
Allowed inputsVx > 0 and Vy > 0 onlyVx and Vy of any sign
Output signAlways one polarityFollows sign of Vx·Vy
Typical circuitLog–antilog multiplierGilbert cell (transconductance)
UseDC/positive signalsAC signals, modulators, phase detectors

A log amplifier cannot accept negative input (ln of a negative number is undefined), so a log-antilog multiplier is only single-quadrant. A four-quadrant multiplier works in all four quadrants of the Vx–Vy plane.

Output voltage of four-quadrant multiplier (Gilbert cell)

         +Vcc            +Vcc
          RL              RL
          |  Io1     Io2  |
          +--+--  ...  +--+----> Vo
         Q3  Q4       Q5  Q6    <- Vx (cross-coupled)
           \/           \/
           I1           I2
           Q1 ---------- Q2     <- Vy
                  |
                 IEE
                  |
                -VEE

Q3, Q5 collectors join to give Io1; Q4, Q6 collectors join to give Io2.

For a differential pair: ΔI = I·tanh(V/2V_T).

  1. Lower pair:
I1 − I2 = IEE·tanh(Vy/2V_T)
  1. Upper pairs (both driven by Vx, outputs cross-coupled):
IC3 − IC4 = I1·tanh(Vx/2V_T)
IC6 − IC5 = I2·tanh(Vx/2V_T)
  1. Output:
ΔIo = (IC3 + IC5) − (IC4 + IC6)
    = (I1 − I2)·tanh(Vx/2V_T)
    = IEE·tanh(Vx/2V_T)·tanh(Vy/2V_T)
  1. For small inputs, tanh(u) ≈ u:
ΔIo ≈ IEE·Vx·Vy / (4V_T²)
Vo  = RL·ΔIo = K·Vx·Vy,  K = IEE·RL/(4V_T²)

Because tanh is odd, a change of sign of Vx or Vy changes the sign of Vo, so all four quadrants are covered. Practical ICs (AD633) linearise the cell and give Vo = Vx·Vy/10 V.

  • 2072 Kartik · 7 marks

Construct and explain the multiplier circuit using log and antilog amplifier and hence use the multiplier to realize the divider circuit.

Answer

A multiplier can be built by taking the log of each input, adding the logs and then taking the antilog, because ln V1 + ln V2 = ln(V1·V2). A divider uses subtraction instead: ln V1 − ln V2 = ln(V1/V2).

Building blocks

  • Log amp (transistor in feedback): Vo = −V_T ln(Vi / (R·Is))
  • Antilog amp (transistor at input): Vo = −R·Is·e^(Vi/V_T)

Multiplier circuit

V1 -->[LOG AMP 1]--Va--R--+
                          |
                     [INVERTING   ]
                     [SUMMER, Rf=R]--Vc-->[ANTILOG]--> Vo
                          |
V2 -->[LOG AMP 2]--Vb--R--+
  1. Log amp outputs:
Va = −V_T ln(V1/(R·Is))
Vb = −V_T ln(V2/(R·Is))
  1. Inverting summer (Rf = R):
Vc = −(Va + Vb) = V_T [ln(V1/RIs) + ln(V2/RIs)]
   = V_T ln( V1·V2 / (R·Is)² )
  1. Antilog amp (transistor polarity chosen to accept this sign; output written in magnitude):
Vo = R·Is·e^(Vc/V_T) = R·Is · V1·V2/(R·Is)²
Vo = V1·V2 / (R·Is) = K·V1·V2,   K = 1/(R·Is)

So the output is proportional to the product of the two inputs.

Divider from the multiplier

Replace the summer by a difference amplifier (subtractor) so that the log of the divisor is subtracted:

V1 -->[LOG AMP 1]--Va--->(+)
                         [SUBTRACTOR]--Vc-->[ANTILOG]--> Vo
V2 -->[LOG AMP 2]--Vb--->(−)
Vc = Vb − Va = V_T [ln(V1/RIs) − ln(V2/RIs)]
   = V_T ln(V1/V2)
Vo = R·Is · e^(Vc/V_T) = R·Is · (V1/V2)
Vo = K'·V1/V2,   K' = R·Is

Another simple way: put the multiplier in the feedback path of an op-amp. With Vz at the input resistor and the multiplier output K·Vo·Vx fed back, the virtual-ground condition gives Vz = −K·Vo·Vx, so Vo = −Vz/(K·Vx), a divider.

Notes:

  • Inputs must be positive (one-quadrant operation).
  • Matched transistors on the same chip cancel Is; temperature compensation is needed for V_T.
  • 2071 Chaitra · 4 marks

Find the relationship of input and output voltage in the following figure. [Figure: three log amplifiers: V1, V2 and V3 each pass through a resistor R to the inverting input of their own op-amp (non-inverting inputs grounded), with transistors Q1, Q2 and Q3 (bases grounded) as the respective feedback elements. Each log-amp output passes through a resistor R to the inverting input of a summing op-amp with feedback resistor 2R; its non-inverting input is grounded; its output is V0.]

Answer

Each input stage is a log amplifier (transistor in the feedback path), and the last stage is an inverting summer with gain −2R/R = −2.

Log amplifier outputs

For a log amp with input resistor R and grounded-base transistor in feedback:

V01 = −V_T ln( V1 / (R·Is) )
V02 = −V_T ln( V2 / (R·Is) )
V03 = −V_T ln( V3 / (R·Is) )

where V_T = kT/q ≈ 26 mV at room temperature and Is is the reverse saturation current (transistors assumed matched).

Summing amplifier

Inputs through R, feedback 2R:

V0 = −(2R/R)(V01 + V02 + V03)
   = −2 (V01 + V02 + V03)

Substituting:

V0 = 2V_T [ ln(V1/RIs) + ln(V2/RIs) + ln(V3/RIs) ]
   = 2V_T ln( V1·V2·V3 / (R·Is)³ )

Answer: V0 = 2V_T · ln[ V1·V2·V3 / (R·Is)³ ]

This can also be written as V0 = V_T ln[ (V1·V2·V3)² / (R·Is)⁶ ], i.e. the output is proportional to the log of the square of the product of the three inputs. The circuit works only for positive V1, V2, V3.

  • 2070 Asar · 7 marks

How a multifunction converter can be constructed using log and antilog amplifiers? Explain with circuit realization.

Answer

A multifunction converter is a log-antilog circuit whose output is

Vo = Vy · (Vz / Vx)^m

By choosing the inputs and the exponent m, the same circuit performs multiplication, division, squaring, square-root and other powers (e.g. the Burr-Brown 4302 IC).

Circuit realization

Vz -->[LOG AMP]--V1-->(+)
                      [SUBTRACTOR]--V3-->[GAIN m]--V4
Vx -->[LOG AMP]--V2-->(−)                (pot/R ratio)
                                              |
Vy -->[LOG AMP]--V5---------------->[SUMMER]<-+
                                       |
                                       V6
                                       |
                                  [ANTILOG AMP]--> Vo

Working and derivation

Take each log amp as V = V_T ln(Vin/Vref), with Vref = R·Is (signs handled by inverting stages).

  1. Log of Vz and Vx:
V1 = V_T ln(Vz/Vref)
V2 = V_T ln(Vx/Vref)
  1. Subtractor:
V3 = V1 − V2 = V_T ln(Vz/Vx)
  1. Gain stage (voltage divider or amplifier, gain m):
V4 = m·V_T ln(Vz/Vx) = V_T ln[(Vz/Vx)^m]
  1. Add log of Vy:
V6 = V4 + V_T ln(Vy/Vref)
   = V_T ln[ (Vy/Vref)·(Vz/Vx)^m ]
  1. Antilog amp:
Vo = Vref · e^(V6/V_T)
Vo = Vy · (Vz/Vx)^m

Functions obtained

SettingOutputFunction
m = 1, Vx = 1 VVy·VzMultiplier
m = 1, Vy = 1 VVz/VxDivider
m = 2, Vx = Vy = 1 VVz²Squarer
m = 0.5, Vx = Vy = 1 V√VzSquare root
0.2 < m < 5Vy(Vz/Vx)^mGeneral power/root

m < 1 is set with a resistor divider; m > 1 with a non-inverting amplifier. Matched transistors cancel Is, and all inputs must be positive.

  • 2070 Chaitra · 2+5 marks

What do you understand by four-quadrant multiplier? Draw the circuit diagram and derive expression for its output voltage.

Answer

Four-quadrant multiplier

A multiplier gives Vo = K·Vx·Vy. If both inputs can be positive or negative and the output takes the correct sign, the multiplier works in all four quadrants of the Vx–Vy plane and is called a four-quadrant multiplier.

            Vy
     II      |      I
  Vx<0,Vy>0  |  Vx>0,Vy>0
   Vo < 0    |   Vo > 0
 ------------+------------ Vx
  Vx<0,Vy<0  |  Vx>0,Vy<0
   Vo > 0    |   Vo < 0
     III     |      IV

A log-antilog multiplier works only in quadrant I (one-quadrant). A four-quadrant multiplier is needed for AC signals, e.g. in modulators, phase detectors and power measurement.

Circuit (Gilbert cell)

         +Vcc            +Vcc
          RL              RL
          |  Io1     Io2  |
          +--+--  ...  +--+----> Vo
         Q3  Q4       Q5  Q6    <- Vx (cross-coupled)
           \/           \/
           I1           I2
           Q1 ---------- Q2     <- Vy
                  |
                 IEE
                  |
                -VEE

Collectors of Q3, Q5 give Io1; collectors of Q4, Q6 give Io2.

Derivation

Differential pair with tail current I and input V: ΔI = I·tanh(V/2V_T).

Lower pair:   I1 − I2   = IEE·tanh(Vy/2V_T)
Upper pairs:  IC3 − IC4 = I1·tanh(Vx/2V_T)
              IC6 − IC5 = I2·tanh(Vx/2V_T)

ΔIo = (IC3 + IC5) − (IC4 + IC6)
    = (IC3 − IC4) − (IC6 − IC5)
    = (I1 − I2)·tanh(Vx/2V_T)
    = IEE·tanh(Vx/2V_T)·tanh(Vy/2V_T)

For small signals, tanh(u) ≈ u:

ΔIo ≈ IEE·Vx·Vy/(4V_T²)
Vo  = RL·ΔIo = (IEE·RL/4V_T²)·Vx·Vy = K·Vx·Vy

The product of two odd functions keeps the correct sign for every combination of input polarities, so the circuit is four-quadrant. IC versions (AD633, MC1495) give Vo = Vx·Vy/10.

  • 2069 Chaitra · 7 marks

How can you find the RMS value of a sinusoidal signal using log and antilog amplifiers? Explain with necessary derivations and circuit diagrams.

Answer

The RMS value is Vrms = √( average of Vi² ). A log-antilog circuit computes this implicitly: it forms Vi²/Vo, averages it and feeds the result back as Vo. This avoids a separate squarer whose output range would be very large.

Principle

Vo = avg( Vi² / Vo )
Vo is DC, so Vo = avg(Vi²)/Vo
Vo² = avg(Vi²)
Vo  = √avg(Vi²) = Vrms

Circuit (block form)

Vi -->[ABSOLUTE ]--|Vi|-->[LOG]--V1--x2--+
      [VALUE CKT]                         |
                                     [SUBTRACT]--V3
         +-->[LOG]--V2------------->(−)   |
         |                           [ANTILOG]--V4
         |                                |
         |                         [LOW-PASS RC]
         |                         [ (averager) ]
         |                                |
         +--------------------------------+--> Vo

Derivation

  1. Precision full-wave rectifier gives |Vi| (log amp needs a positive input; |Vi|² = Vi²).
  2. Log amp and gain of 2:
V1 = 2V_T ln(|Vi|/Vref) = V_T ln(Vi²/Vref²)
  1. Log of the output (feedback):
V2 = V_T ln(Vo/Vref)
  1. Subtractor:
V3 = V1 − V2 = V_T ln( Vi² / (Vref·Vo) )
  1. Antilog:
V4 = Vref·e^(V3/V_T) = Vi² / Vo
  1. Low-pass filter (time constant much larger than signal period) takes the average:
Vo = avg(Vi²/Vo) = avg(Vi²)/Vo
Vo = √avg(Vi²)

For a sinusoid Vi = Vm sin ωt

avg(Vi²) = (1/T)∫₀ᵀ Vm² sin²ωt dt
         = (Vm²/T)∫₀ᵀ (1 − cos2ωt)/2 dt
         = Vm²/2
Vo = √(Vm²/2) = Vm/√2 = 0.707·Vm

Example: for Vi = 10 sin ωt V, the circuit gives Vo = 7.07 V DC.

Advantages: it is a true RMS converter (correct for any waveform, not only sine), and its dynamic range is wide because the internal signal Vi²/Vo stays close to Vi in size.

Questions from Old Question Collection (EX 601) (IOE EX 601 exam papers from 2068 Chaitra to 2074 Chaitra). Answers are written for this site; check them against your class notes.

Chapter titles and hours from the IOE syllabus ↗