Introduction to Electronics Engineering

A full-bridge rectifier converts AC into pulsating DC using four diodes connected as a bridge, so both half cycles of the input are used.

        A (AC in)
       /  \
     D1    D4
     /      \
   (+)-RL-(-)
     \      /
     D3    D2
       \  /
        B (AC in)

D1 and D2 conduct together on one half cycle; D3 and D4 conduct on the other. Each pair connects the load to the supply.

Operation:

• Positive half cycle (A positive, B negative): D1 and D2 are forward biased, D3 and D4 reverse biased. Current flows A → D1 → load (top to bottom) → D2 → B.
• Negative half cycle (B positive, A negative): D3 and D4 conduct. Current flows B → D3 → load (top to bottom, the same direction) → D4 → A.

The current through $R_L$ has the same direction in both half cycles, so the output is a pulsating unidirectional waveform with two pulses per cycle (frequency $2f$).

Average (DC) output voltage. If the secondary peak voltage is $V_m$ (ignoring diode drops):

$$V_{dc}=\frac{1}{\pi}\int_0^{\pi}V_m\sin\theta\,d\theta=\frac{2V_m}{\pi}=0.637\,V_m$$ $$I_{dc}=\frac{2I_m}{\pi}, \qquad V_{rms}=\frac{V_m}{\sqrt2}, \qquad \text{ripple factor}=0.48, \quad \eta_{max}=81.2\%$$

With silicon diodes, two diodes conduct at a time, so $V_{dc}=\frac{2(V_m-1.4)}{\pi}$ approximately. The peak inverse voltage of each diode is $V_m$. No centre-tapped transformer is needed.

Given: $V_i=16$ V, $R=1\ \text{k}\Omega$, $V_Z=10$ V, $P_{ZM}=30$ mW.

Method. First assume the Zener is OFF (removed) and find the voltage across the load. If it is at least $V_Z$, the Zener is ON and $V_L=V_Z$.

Case 1: $R_L=1.2\ \text{k}\Omega$

$$V_L=\frac{R_LV_i}{R+R_L}=\frac{1.2\times16}{1+1.2}=8.727\ \text{V}$$

Since $8.727\ \text{V}<10\ \text{V}$, the Zener is OFF (not in breakdown).

$$V_L=8.73\ \text{V},\quad V_R=16-8.727=7.27\ \text{V},\quad I_Z=0,\quad P_Z=0$$

Case 2: $R_L=3\ \text{k}\Omega$

$$V_L=\frac{3\times16}{1+3}=12\ \text{V}>10\ \text{V}$$

The Zener is ON, so $V_L=V_Z=10$ V.

$$\begin{aligned} V_R&=16-10=6\ \text{V}\\ I_R&=\frac{6}{1\ \text{k}\Omega}=6\ \text{mA}\\ I_L&=\frac{10}{3\ \text{k}\Omega}=3.333\ \text{mA}\\ I_Z&=I_R-I_L=6-3.333=2.667\ \text{mA}\\ P_Z&=V_ZI_Z=10\times2.667=26.67\ \text{mW} \end{aligned}$$

$P_Z=26.67\ \text{mW}<P_{ZM}=30$ mW, so the Zener is safe.

When a p-n junction diode is reverse biased, only a tiny reverse saturation current (due to minority carriers) flows. If the reverse voltage is increased beyond a certain value, the current suddenly rises sharply. This effect is called reverse breakdown, and the voltage at which it occurs is the breakdown voltage. If the current is not limited by a resistor, the heat can destroy the diode; if limited, the junction is not harmed.

There are two mechanisms:

1. Avalanche breakdown (usually above about 5-6 V, lightly doped junctions). The wide depletion region lets minority carriers gain high kinetic energy in the strong field. They collide with atoms and release new electron-hole pairs, which are accelerated and collide again, so the current multiplies like an avalanche.
2. Zener breakdown (below about 5 V, heavily doped junctions). The depletion layer is very thin, so even a small reverse voltage creates a very strong field ($>10^7$ V/m) that pulls electrons directly out of the covalent bonds (field emission), giving a large current.

   I (mA)
    |   forward
    |      /
 ---+-----/---------> V
    | Vbr
    |  |
    |  | reverse breakdown: current
    v  v  rises, voltage almost constant

The nearly constant voltage during breakdown is used in Zener diodes for voltage regulation.

A Zener diode is a heavily doped p-n diode designed to operate in the reverse breakdown region. In this region, the voltage across it stays almost constant at $V_Z$ while the current changes over a wide range, which makes it a voltage regulator.

        R
  +----/\/\----+-------+
  |            |       |
 Vi         Zener     RL  -> Vo = Vz
  |            | (reverse)  |
  +------------+-------+---+

The Zener is connected in reverse across the load, with a series resistor $R$ that limits the current.

Working:

1. For $V_i>V_Z$, the Zener is in breakdown and $V_o=V_Z$.
2. Input (line) variation: if $V_i$ rises, the total current $I=(V_i-V_Z)/R$ rises. The extra current flows through the Zener ($I_Z$ increases) while $I_L$ and $V_o$ stay constant. The extra drop appears across $R$.
3. Load variation: if the load current $I_L$ increases, $I_Z$ falls by the same amount, keeping $I=I_Z+I_L$ constant. The output stays at $V_Z$ as long as $I_Z$ remains above the minimum $I_{Z,min}$ and below the maximum $I_{Z,max}$.

Design: $R=\dfrac{V_{i,min}-V_Z}{I_{Z,min}+I_{L,max}}$, and the Zener power rating $P_Z=V_ZI_{Z,max}$.

Biasing means applying suitable DC voltages and currents to a transistor to fix its operating point (Q-point) in the active region, so the signal is amplified without distortion. The operating point should be stable against changes in temperature and $\beta$.

Given: collector-feedback bias, $V_{CC}=12$ V, $I_C=1.2$ mA, $V_{CE}=6$ V, $\beta=100$. Assume $V_{BE}=0.7$ V (silicon).

Base current:

$$I_B=\frac{I_C}{\beta}=\frac{1.2\ \text{mA}}{100}=12\ \mu\text{A}$$

Finding $R_C$. The current through $R_C$ is $I_C+I_B=1.212$ mA. KVL on the output loop:

$$V_{CC}=(I_C+I_B)R_C+V_{CE}$$ $$R_C=\frac{12-6}{1.212\ \text{mA}}=4.95\ \text{k}\Omega\ (\approx5\ \text{k}\Omega)$$

Finding $R_B$. KVL through $R_B$ and the base-emitter junction:

$$V_{CE}=I_BR_B+V_{BE}$$ $$R_B=\frac{6-0.7}{12\ \mu\text{A}}=441.7\ \text{k}\Omega$$

Answer: $R_C\approx4.95\ \text{k}\Omega$ (5 kΩ standard), $R_B\approx441.7\ \text{k}\Omega$ (use 470 kΩ standard / 440 kΩ).

If $I_B$ is neglected in the $R_C$ drop, $R_C=6/1.2\ \text{mA}=5\ \text{k}\Omega$, the same to standard value accuracy.

Given: $V_i=120$ V, $R=5\ \text{k}\Omega$, $V_Z=50$ V, $R_L=10\ \text{k}\Omega$.

Check Zener state. With the Zener removed, the load voltage is

$$V_L=\frac{10}{5+10}\times120=80\ \text{V}>50\ \text{V}$$

So the Zener is in breakdown (ON) and holds the load at 50 V.

(i) Output voltage:

$$V_o=V_Z=50\ \text{V}$$

(ii) Voltage across the series resistance:

$$V_R=120-50=70\ \text{V}$$

(iii) Zener current.

$$I=\frac{V_R}{R}=\frac{70}{5\ \text{k}\Omega}=14\ \text{mA}$$ $$I_L=\frac{50}{10\ \text{k}\Omega}=5\ \text{mA}$$ $$I_Z=I-I_L=14-5=9\ \text{mA}$$

Answer: (i) 50 V, (ii) 70 V, (iii) 9 mA (total current 14 mA, load current 5 mA).

Why "bipolar"

A transistor is called a Bipolar Junction Transistor because its current is carried by both types of charge carriers, electrons and holes, and it has two p-n junctions (emitter-base and collector-base). In a field-effect transistor, only one carrier type conducts (unipolar).

npn transistor in active mode

In the active region, the emitter-base junction is forward biased and the collector-base junction is reverse biased.

     E (n)        B (p)        C (n)
   +--------+  +--------+  +----------+
   | e- ---->  thin  ---->  collected |
   +--------+  +--------+  +----------+
     VEE (+ forward)     VCC (reverse)
         IE = IB + IC

Operation:

1. The heavily doped emitter injects a large number of electrons into the base, because the forward bias lowers the barrier at the emitter-base junction.
2. The base is very thin and lightly doped, so only about 1-5% of the electrons recombine with holes there. This forms the small base current $I_B$.
3. The rest (95-99%) diffuse across the base and reach the collector-base junction. The reverse bias there creates a strong field that sweeps them into the collector, giving collector current $I_C$.
4. Currents obey

$$I_E=I_B+I_C, \qquad I_C=\alpha I_E+I_{CBO}, \qquad I_C=\beta I_B$$

with $\alpha=0.95$-$0.99$ and $\beta=\alpha/(1-\alpha)$ (typically 50-300).

A small change in base current causes a large change in collector current, so the transistor acts as a current amplifier.

Logic gates are the basic building blocks of digital circuits. A gate has one or more binary inputs (0 or 1) and gives one binary output according to a logical rule. They are made from transistors and diodes in ICs (TTL, CMOS).

Truth table for two-input gates:

NAND and NOR are called universal gates, because any logic function can be built using only one of them. Gates are used in adders, counters, memories, alarms and control circuits.

Boolean algebra, developed by George Boole, is the algebra of binary variables (0 and 1) with the operations AND (·), OR (+) and NOT (bar). It is used to describe and simplify digital logic circuits, so that fewer gates are needed.

Basic laws and identities:

Also, double negation: $\bar{\bar A}=A$.

De Morgan's theorems:

$$\overline{A\cdot B}=\bar A+\bar B, \qquad \overline{A+B}=\bar A\cdot\bar B$$

Example of simplification:

$$Y=AB+A\bar B=A(B+\bar B)=A\cdot1=A$$

Boolean expressions can be written in sum-of-products or product-of-sums form, and further simplified using Karnaugh maps.

Ex-OR (XOR) gate. It gives output 1 when its two inputs are different (odd number of 1s), and 0 when they are equal.

$$Y=A\oplus B=A\bar B+\bar AB$$

Ex-NOR (XNOR) gate. It is the complement of XOR. Output is 1 when the inputs are equal.

$$Y=\overline{A\oplus B}=AB+\bar A\bar B$$

 A --|=\\
     |  )>-- A xor B        XNOR: same, with a bubble
 B --|=//                     (small circle) at the output

Applications:

• XOR: half adder (sum $=A\oplus B$), binary adders/subtractors, parity generators and checkers, controlled inverter, binary-to-Gray code conversion.
• XNOR: equality (comparator) circuits, which give 1 when two bits are the same.